AM26LV32E
- Meets or exceeds standard TIA/EIA-422-B and ITU recommendation V.11
- Operates from a single 3.3-V power supply
- Switching rates up to 32 MHz
- ESD Protection for RS422 bus pins (See ESD Ratings)
- Low power dissipation: 27 mW typical
- Open circuit fail-safe
- ±7-V Common-mode input voltage range with ±200-mV sensitivity
- Accepts 5-V logic inputs with 3.3-V supply (enable inputs)
- Input hysteresis: 35 mV typical
- Pin-to-pin compatible with AM26C32, AM26LS32
- I off Supports partial-power-down mode operation
The AM26LV32E device consists of quadruple differential line receivers with 3-state outputs. This device is designed to meet TIA/EIA-422-B and ITU recommendation V.11 drivers with reduced supply voltage. The device is optimized for balanced bus transmission at switching rates up to 32 MHz. The 3-state outputs permit connection directly to a bus-organized system. The AM26LV32E has an internal fail-safe circuitry that prevents the device from putting an unknown voltage signal at the receiver outputs. In the open fail-safe, a high state is produced at the respective output. This device is supported for partial-power-down applications using I off. I off circuitry disables the outputs, preventing damaging current back-flow through the device when it is powered down.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | AM26LV32E Low-Voltage High-Speed Quadruple Differential Line Receiver With ±15-KV IEC ESD Protection datasheet (Rev. E) | PDF | HTML | 2023年 8月 9日 |
Application note | Debugging Sitara AM2x Microcontrollers | PDF | HTML | 2022年 10月 24日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (D) | 16 | Ultra Librarian |
SOP (NS) | 16 | Ultra Librarian |
TSSOP (PW) | 16 | Ultra Librarian |
VQFN (RGY) | 16 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。