DAC38RF80
- 14-bit resolution
- Maximum DAC sample rate: 9 GSPS
- Key Specifications:
- RF full-scale output power at 2.1 GHz:
- DAC38RF80/90/84: 0 dBm
- DAC38RF83/93/85: 3 dBm (with 2:1 balun)
- Spectral performance(on-chip PLL, DIFF):
- fDAC = 5898.24 MSPS, fOUT = 2.14 GHz
- WCDMA ACLR: 75 dBc
- WCDMA alt-ACLR: 77 dBc
- fDAC = 8847.36 MSPS, fOUT = 3.7 GHz
- 20 MHz LTE ACLR: 63 dBc
- fDAC = 9 GSPS, fOUT = 1.8 GHz
- IMD3 = 70 dBc (–6 dBFS, 10-MHz tone spacing)
- NSD = –157 dBc/Hz
- fDAC = 5898.24 MSPS, fOUT = 2.14 GHz
- RF full-scale output power at 2.1 GHz:
- Dual-band digital up-converter per DAC
- 6, 8, 10, 12, 16, 18, 20 or 24x interpolation
- 4 Independent NCOs with 48-bit resolution
- JESD204B Interface, subclass 1
- Support for multichip synchronization
- Maximum lane rate: 12.5 Gbps
- Single-ended output with integrated balun (DAC38RF80/90/84) covering 700 MHz to 3800 MHz
- Internal PLL and VCO with bypass
- fC(VCO) = 5.9 or 8.9 GHz
- Power dissipation: 1.4 to 2.2 W/ch
- Power supplies: –1.8 V, 1 V, 1.8 V
- Package: 10 x 10 mm BGA, 0.8 mm pitch, 144-balls
The DAC38RFxx is a family of high-performance, dual/single-channel, 14-bit, 9-GSPS, RF-sampling digital-to-analog converters (DACs) that are capable of synthesizing wideband signals from 0 to 4.5 GHz. A high dynamic range allows the DAC38RFxx family to generate signals for a wide range of applications including 3G/4G signals for wireless base-stations and radar.
The devices feature a low-power JESD204B Interface with up to 8 lanes with a maximum bit rate of 12.5 Gbps allowing an input data rate of 1.25 GSPS complex per channel. The DAC38RFxx provides two digital up-converters per channel, with multiple options for interpolation rates. A digital quadrature modulator with independent, frequency flexible NCOs are available to support multi-band operation. An optional low-jitter PLL/VCO simplifies the DAC sampling clock generation by allowing use of a lower frequency reference clock.
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設計與開發
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The DAC38RF80EVM is the circuit board for evaluating DAC38RF80/84/90 digital-to-analog converters (DACs). The EVM can be used to evaluate the performance of the DAC up to 9-GSPS sampling rate. It is designed to work with the FPGA-based pattern generator card TSW14J56EVM (Rev B and up). The (...)
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TSW40RF80 評估模組 (EVM) 是二發射二接收 (2T2R) 射頻取樣收發器參考設計。本模組包含 DAC38RF80 雙通道射頻取樣數位轉類比轉換器 (DAC) 及 ADC32RF45 雙通道射頻取樣類比轉數位轉換器 (ADC)。
DAC38RF80 取樣率最高可運作 9 GSPS,包括用於產生高頻時鐘的板載 PLL/VCO。輸出為單端,可輕鬆從介面連接 50-Ω 電路。ADC32RF45 取樣率最高可運作 3 GSPS。可選擇在各通道中使用雙數位降壓轉換器,或繞過轉換器以存取完整 Nyquist 頻寬。
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SLAC779 — DAC38RF8x KCU105 Firmware
支援產品和硬體
產品
高速 DAC (>10 MSPS)
硬體開發
開發板
TI204C-IP — Request for JESD204 rapid design IP
The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
支援產品和硬體
產品
高速 DAC (>10 MSPS)
高速 ADC (≥10 MSPS)
RF 收發器
RF 發射器
DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.20
This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)
支援產品和硬體
產品
高速 DAC (>10 MSPS)
高速 ADC (≥10 MSPS)
超音波 AFE
RF 收發器
RF 接收器
RF 發射器
硬體開發
開發板
軟體
支援軟體
SLAC722 — DAC38RF8x EVM GUI
支援產品和硬體
產品
高速 DAC (>10 MSPS)
硬體開發
開發板
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TIDA-01215 — 適用於最佳化射頻取樣 DAC 中的突波和相位雜訊的電源參考設計
TIDA-01240 — 射頻取樣 S 波段雷達發送器參考設計
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
FCCSP (AAV) | 144 | Ultra Librarian |
訂購與品質
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- MTBF/FIT 估算值
- 材料內容
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- 進行中持續性的可靠性監測
- 晶圓廠位置
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建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。