DAC38RF82
- 14-Bit resolution, 9-GSPS DAC with multimode operation
- 16-Bit, Dual-channel data mode
- Max input rate: 2.5-GSPS
- Wideband digital up-converter
- Interpolation: 1,2,4,6,8,10,12,16,18,20,24x
- 12-Bit, Dual-channel data mode
- Max input rate: 3.33-GSPS
- Wideband digital Up-converter
- Interpolation: 1,2,24x
- 8-Bit, Single-channel data mode
- Max input rate: 9-GSPS
- 16-Bit, Dual-channel data mode
- JESD204B interface
- Subclass 1 for multichip synchronization
- DAC38RF89: Maximum lane rate: 12.5 Gbps
- DAC38RF82: Maximum lane rate: 12.8 Gbps
- Differential output
- Supports DC coupling
- RF Full-scale output power (with 2:1 balun):
3 dBm at 2.14 GHz
- Internal PLL and VCO with bypass
- DAC38RF82: fC(VCO) = 5.9 or 8.9 GHz
- DAC38RF89: fC(VCO) = 5 or 7.5 GHz
- Power supplies: -1.8 V, 1.0 V, 1.8 V
- Package: 10 x 10 mm BGA, 0.8 mm pitch,
144-balls
The DAC38RF82 and DAC38RF89 are high performance, wide bandwidth RF-sampling digital-to-analog (DACs) that are capable of dual channel input data rate up to 3.33 GSPS or single-channel operation with 8-bits up to 9-GSPS. The devices have a low power JESD204B Interface with up to 8 lanes, with a maximum bit rate of 12.5 Gbps (DAC38RF89) and 12.8 Gbps (DAC38RF82).
In dual channel operation, the input interface is capable of data rates up to 3.33 GSPS at 12-bits and 2.5 GSPS at 16-bits resolution without interpolation. When used as a complex baseband transmitter with interpolation modes from 2x to 24x, the DAC38RF82 or DAC38RF89 is capable of synthesizing wideband signals up to 2 GHz bandwidth with 16-bit input resolution and 2.66 GHz bandwidth with 12-bit input resolution.
The 8-bit mode allows an input at the full 9 GSPS maximum DAC sample rate and can synthesize wideband signals from 0 to 4.5 GHz.
An optional low jitter PLL/VCO simplifies the DAC clock generation by allowing use of a lower frequency reference clock. DAC38RF82 and DAC38RF89 support different VCO frequency ranges, summarized in Device Comparison Table.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | DAC38RF8x Dual-Channel, Differential-Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface, On-Chip PLL and Wide-Band Interpolation datasheet (Rev. D) | PDF | HTML | 2020年 4月 14日 |
Application note | Impact of Power-Supply Noise on Phase Noise Performance of RF DACs | 2018年 6月 13日 | ||
EVM User's guide | TSW40RF8x Evaluation Module User's Guide (Rev. A) | 2017年 9月 27日 | ||
Application note | Eye Scan Testing with the DAC38RFxx | 2017年 8月 10日 | ||
Application note | Quick-Start Methods in Simulating the DAC38RF8x Input/Output Buffer Information | 2017年 8月 2日 | ||
Application note | DAC38RF8x Test Modes | 2017年 7月 25日 | ||
EVM User's guide | DAC38RF8xEVM User's Guide (Rev. A) | 2017年 3月 24日 | ||
Application note | Digital RF Power Control for Power Amplifer Protection in Wireless Base | 2017年 2月 6日 | ||
Application note | RF Sampling DAC with 800 MHz of IBW LTE | 2016年 10月 28日 | ||
Design guide | Efficient Power Supply Scheme for RF-Sampling DAC Reference Design | 2016年 8月 22日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
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支援產品和硬體
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高速 DAC (>10 MSPS)
RF 發射器
硬體開發
開發板
TI204C-IP — Request for JESD204 rapid design IP
The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
支援產品和硬體
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高速 DAC (>10 MSPS)
高速 ADC (≥10 MSPS)
RF 收發器
RF 發射器
DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.20
This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)
支援產品和硬體
產品
高速 DAC (>10 MSPS)
高速 ADC (≥10 MSPS)
超音波 AFE
RF 收發器
RF 接收器
RF 發射器
硬體開發
開發板
軟體
支援軟體
SLAC722 — DAC38RF8x EVM GUI
支援產品和硬體
產品
高速 DAC (>10 MSPS)
RF 發射器
硬體開發
開發板
TIDA-01215 — 適用於最佳化射頻取樣 DAC 中的突波和相位雜訊的電源參考設計
TIDA-01435 — 適用於微波回程連線的高頻寬、零中頻參考設計
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
FCCSP (AAV) | 144 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。