ADS42B49
- Maximum Sample Rate: 250 MSPS
- Ultralow Power:
- 850-mW Total Power at 250 MSPS
- Integrated Analog Input Buffer:
- Input Capacitance: 2.2 pF at 170 MHz
- Input Resistance: 1.1 kΩ at 170 MHz
- High Dynamic Performance:
- 85-dBc SFDR at 170 MHz
- 70.7-dBFS SNR at 170 MHz
- Crosstalk: > 85 dB at 185 MHz
- Programmable Gain Up to 6 dB for
SNR and SFDR Trade-off - DC Offset Correction
- Output Interface Options:
- 1.8-V Parallel CMOS Interface
- Double Data Rate (DDR) LVDS with
Programmable Swing:- Standard Swing: 350 mV
- Low Swing: 200 mV
- Supports Low Input Clock Amplitude
Down to 200 mVPP - Package: 9.00 mm × 9.00 mm, 64-Pin Quad Flat
No-Lead (VQFN) Package
The ADS42B49 is an ultralow-power dual-channel, 14-bit analog-to-digital converter (ADC) featuring integrated analog input buffers. It uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power. The presence of analog input buffers makes this device easy to drive and helps achieve high performance over a wide frequency range. The ADS42B49 is well-suited for multi-carrier, wide bandwidth communications applications.
The ADS42B49 has gain options that can be used to improve SFDR performance at lower full-scale input ranges. This device also includes a dc offset correction loop that can be used to cancel the ADC offset. Both DDR LVDS and parallel CMOS digital output interfaces are available in a compact VQFN-64 PowerPAD™ package.
The device includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The ADS42B49 is specified over the industrial temperature range (–40°C to 8°C).
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | ADS42B49 Dual-Channel, 14-Bit, 250-MSPS Ultralow-Power ADC with Analog Input Buffer datasheet (Rev. C) | PDF | HTML | 2016年 3月 30日 |
Application note | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 2015年 5月 22日 | ||
User guide | ADS42B4x - User's Guide (Rev. A) | 2015年 1月 30日 | ||
Application note | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 2013年 7月 19日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
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VQFN (RGC) | 64 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點