ADS8902B
- Resolution: 20-Bits
- High Sample Rate With No Latency Output:
- ADS8900B: 1-MSPS
- ADS8902B: 500-kSPS
- ADS8904B: 250-kSPS
- Integrated LDO Enables Low-Power, Single-Supply Operation
- Low Power Reference Buffer with No Droop
- Excellent AC and DC Performance:
- SNR: 104.5-dB, THD: –125-dB
- DNL: ±0.2-ppm, 20-Bit No-Missing-Codes
- INL: ±1-ppm
- Wide Input Range:
- Unipolar Differential Input Range: ±VREF
- VREF Input Range: 2.5-V to 5-V
- Enhanced-SPI Digital Interface
- Interface SCLK : 22-MHz at 1-MSPS.
- Configurable Data Parity Output.
- Extended Temperature Range: –40°C to +125°C
- Small Footprint: 4-mm × 4-mm VQFN
The ADS8900B, ADS8902B, and ADS8904B (ADS890xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 20-bit successive-approximation-register (SAR) analog-to-digital converters (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS891xB (18-bit) and ADS892xB (16-bit) resolution variants.
The ADS89xxB boosts analog performance while maintaining high-resolution data transfer by using TI’s Enhanced-SPI feature. Enhanced-SPI enables ADS89xxB in achieving high throughput at lower clock speeds, there by simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies the host’s clocking-in of data there by making it ideal for applications involving FPGAs, DSPs. ADS89xxB is compatible with standard SPI Interface.
The ADS89xxB has an internal data parity feature which can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | ADS890xB 20-Bit, High-Speed SAR ADCs With Integrated Reference Buffer, and Enhanced Performance Features datasheet (Rev. A) | PDF | HTML | 2017年 6月 29日 |
Application note | Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs | 2018年 6月 14日 | ||
Application brief | Improving Input Settling for Precision Data Converters | 2017年 12月 12日 | ||
Application brief | Optimizing Data Transfer on High-Resolution, High-Throughput Data Converters | 2017年 12月 12日 | ||
Application brief | Simplify Isolation Designs Using an Enhanced-SPI ADC Interface | 2017年 12月 11日 | ||
White paper | Enabling Faster, Smarter, and More Robust Solutions for SAR ADSx With multiSPI | 2016年 11月 8日 |
設計與開發
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ADS8900BEVM-PDK — ADS8900B 全差動輸入、20 位元 SAR ADC EVM 性能展示套件 (PDK)
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ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
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產品
精密度運算放大器 (Vos<1mV)
一般用途運算放大器
音訊運算放大器
轉阻放大器
高速運算放大器 (GBW ≥ 50 MHz)
功率運算放大器
視訊放大器
線路驅動器
轉導放大器與雷射驅動器
全差分放大器
精確 ADC
生物感測 AFE
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觸控式螢幕控制器
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晶粒與晶圓服務
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TIPD211 — 適用於測試與量測應用的 20 位元、1 MSPS、四通道小型設計參考設計
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
VQFN (RGE) | 24 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
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建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。