ADS8327
- 2.7-V to 5.5-V Analog Supply, Low Power:
- 10.6 mW (500 kHz, +VA = 2.7 V,
+VBD = 1.8 V)
- 10.6 mW (500 kHz, +VA = 2.7 V,
- 500-kHz Sampling Rate
- Excellent DC Performance
- ±1.5 LSB Typ, ±2 LSB Max INL
- ±0.6 LSB Typ, ±1 LSB Max DNL
- 16-Bit NMC Over Temperature
- ±0.5 mV Max Offset Error at 2.7 V
- ±1 mV Max Offset Error at 5 V
- Excellent AC Performance at fI = 10 kHz with 91 dB SNR, 100 dB SFDR, –96 dB THD
- Built-In Conversion Clock (CCLK)
- 1.65 V to 1.5×(+VA) I/O Supply
- SPI/DSP Compatible Serial
- SCLK up to 50 MHz
- Comprehensive Power-Down Modes:
- Deep Power-Down
- Nap Power-Down
- Auto Nap Power-Down
- Unipolar Input Range: 0 V to VREF
- Software Reset
- Global CONVST (Independent of CS)
- Programmable Status/Polarity EOC/INT
- 16-Pin 4×4 QFN or 16-Pin TSSOP Packages
- Multi-Chip Daisy Chain Mode
- Programmable TAG Bit Output
- Auto/Manual Channel Select Mode
- Communications
- Transducer Interface
- Medical Instruments
- Magnetometers
- Industrial Process Control
- Data Acquisition Systems
- Automatic Test Equipment
The ADS8327 is a low power, 16-bit, 500-kSPS analog-to-digital converter with a unipolar input. The device includes a 16-bit capacitor-based SAR A/D converter with inherent sample and hold.
The ADS8328 is based on the same core and includes a 2-to-1 input MUX with programmable option of TAG bit output. Both the ADS8327 and ADS8328 offer a high-speed, wide voltage serial interface and are capable of chain mode operation when multiple converters are used.
These converters are available in a 16-lead TSSOP or 4×4 QFN packages and are fully specified for operation over the industrial –40°C to +85°C temperature range.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | Low Power, 16-Bit, 500-kHz, Single/Dual Unipolar Input, ADC w/Serial I/F datasheet (Rev. E) | 2011年 1月 27日 | |
White paper | Voltage-reference impact on total harmonic distortion | 2016年 8月 1日 | ||
E-book | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015年 5月 21日 | ||
Application note | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 2011年 3月 17日 | ||
Application note | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 2010年 11月 10日 | ||
Application note | Using the ADS8327 with the TMS320C6713 DSP | 2006年 12月 18日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
支援產品和硬體
產品
精密度運算放大器 (Vos<1mV)
一般用途運算放大器
音訊運算放大器
轉阻放大器
高速運算放大器 (GBW ≥ 50 MHz)
功率運算放大器
視訊放大器
線路驅動器
轉導放大器與雷射驅動器
全差分放大器
精確 ADC
生物感測 AFE
高速 ADC (≥10 MSPS)
接收器
觸控式螢幕控制器
差分放大器
儀器放大器
音訊線路接收器
類比電流感測放大器
數位電源監測器
配備整合式分流電阻器的類比電流感測放大器
具整合式分流電阻器的數位電源監測器
晶粒與晶圓服務
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
支援產品和硬體
產品
高速 ADC (≥10 MSPS)
精確 ADC
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
TSSOP (PW) | 16 | Ultra Librarian |
VQFN (RSA) | 16 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。