ADC101S101
- Specified Over a Range of Sample Rates.
- 6-Lead WSON and SOT-23 Packages
- Variable Power Management
- Single Power Supply with 2.7V – 5.25V Range
- SPI™/QSPI™/MICROWIRE/DSP Compatible
The ADC101S101 is a low-power, single channel, CMOS 10-bit analog-to-digital converter with a high-speed serial interface. Unlike the conventional practice of specifying performance at a single sample rate only, the ADC101S101 is fully specified over a sample rate range of 500 ksps to 1 Msps. The converter is based upon a successive-approximation register architecture with an internal track-and-hold circuit.
The output serial data is straight binary, and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE, and many common DSP serial interfaces.
The ADC101S101 operates with a single supply that can range from +2.7V to +5.25V. Normal power consumption using a +3V or +5V supply is 2.0 mW and 10 mW, respectively. The power-down feature reduces the power consumption to as low as 2.5 µW using a +5V supply.
The ADC101S101 is packaged in 6-lead WSON and SOT-23 packages. Operation over the industrial temperature range of −40°C to +85°C is ensured.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | ADC101S101 Single Channel, 0.5 to 1 Msps, 10-Bit A/D Converter datasheet (Rev. D) | 2014年 1月 24日 | |
E-book | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015年 5月 21日 | ||
User guide | SPUSI2 USB Interface Dongle User Guide | 2012年 2月 23日 | ||
EVM User's guide | 50 ksps to 1 Msps, 12-, 10- and 8-Bit EVM Users Manual | 2012年 2月 20日 | ||
White paper | Amp Closed-Loop Bndwidth Considerations in High Res ADC Apps | 2006年 10月 1日 |
設計與開發
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封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOT-23 (DBV) | 6 | Ultra Librarian |
WSON (NGF) | 6 | Ultra Librarian |
訂購與品質
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- 認證摘要
- 進行中持續性的可靠性監測
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