ADS7057
- 2.5-MSPS Throughput
- Small Package Size:
- X2QFN-8 Package (1.5 mm × 1.5 mm)
- Fully Differential Input Range: ±AVDD
- Wide Operating Range:
- AVDD: 2.35 V to 3.6 V
- DVDD: 1.65 V to 3.6 V (Independent of AVDD)
- Temperature Range: –40°C to +125°C
- Excellent Performance:
- 14-Bit NMC DNL, ±0.9-LSB INL
- 79.5-dB SINAD at 2 kHz
- 77-dB SINAD at 1 MHz
- Low Power Consumption:
- 3.6 mW at 2.5 MSPS With 3.3-V AVDD
- 160 µW at 100 kSPS With 3.3-V AVDD
- 82 µW at 100 kSPS With 2.5-V AVDD
- Integrated Offset Calibration
- SPI-Compatible Serial Interface: 60 MHz
- JESD8-7A Compliant Digital I/O
The ADS7057 device belongs to a family of pin-to-pin compatible, high-speed, low-power, single-channel successive-approximation register (SAR) type analog-to-digital converters (ADCs). The device family includes multiple resolutions, throughputs, and analog input variants (see Table 1 for a list of devices).
The ADS7057 is a 14-bit, 2.5-MSPS SAR ADC that supports fully-differential inputs in the range of ±AVDD, for AVDD in the range of 2.35 V to 3.6 V.
The internal offset calibration feature maintains excellent offset specifications over the entire AVDD and temperature operating range.
The device supports an SPI-compatible serial interface that is controlled by the CS and SCLK signals. The input signal is sampled with the CS falling edge and SCLK is used for both conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interfacing to a variety of host controllers. The ADS7057 complies with the JESD8-7A standard for a normal DVDD range (1.65 V to 1.95 V).
The ADS7057 is available in an 8-pin, small, X2QFN package and is specified over the extended industrial temperature range (–40°C to +125°C). The small form-factor and extremely-low power consumption make this device suitable for space-constrained and battery-powered applications that require high-speed, high-resolution data acquisition.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | ADS7057 14-Bit, 2.5-MSPS, Differential Input, Small-Size, Low-Power SAR ADC datasheet | PDF | HTML | 2017年 12月 7日 |
Circuit design | Single-ended to diff. signal conversion using an op amp & FDA for unipolar signa (Rev. B) | PDF | HTML | 2024年 9月 24日 | |
Circuit design | Single-ended-to-differential circuit using an op amp and FDA for bipolar signals (Rev. B) | PDF | HTML | 2024年 9月 19日 | |
Application brief | Precision ADCs in Servo Drives | PDF | HTML | 2024年 8月 22日 | |
Product overview | Precision ADCs for Motor Encoders and Position Sensing | PDF | HTML | 2023年 3月 27日 | |
User guide | ADS7042EVM-PDK, ADS7049-Q1EVM-PDK, and ADS7057EVM-PDK Evaluation Module (Rev. A) | PDF | HTML | 2022年 1月 13日 | |
Application brief | Improving Response Time and Accuracy in Autonomous Robots With Wideband SAR-ADCs | 2018年 10月 3日 |
設計與開發
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ADS7057EVM-PDK — ADS7057 14 位元 2.5 MSPS 小型低功耗 SAR ADC 性能展示套件 (PDK)
The ADS7057 evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the 14-bit, ADS7057 successive approximation register (SAR) analog-to-digital converter (ADC).
The PDK includes the ADS7057 evaluation board, precision host interface (PHI) controller board, and (...)
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ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
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ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
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TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
X2QFN (RUG) | 8 | Ultra Librarian |
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