ADS54T04
- Dual Channel
- 12-Bit Resolution
- Maximum Clock Rate: 500 Msps
- Low Swing Fullscale Input: 1.0 Vpp
- Analog Input Buffer with High Impedance Input
- Input Bandwidth (3dB): >1.2GHz
- Data Output Interface: DDR LVDS
- 196-Pin BGA Package (12×12mm)
- Power Dissipation: 800mW/ch
- Performance at fin = 230 MHz IF
- SNR: 60.6 dBFS
- SFDR: 77 dBc
- Performance at fin = 700 MHz IF
- SNR: 59.4 dBFS
- SFDR: 70 dBc
- Receive Mode: 2x Decimation with Low Pass or
High Pass Filter - Feedback Mode: Burst Mode Output for Full
Bandwidth DPD Feedback
The ADS54T04 is a high linearity dual channel 12-bit, 500 MSPS analog-to-digital converter (ADC) easing front end filter design for wide bandwidth receivers. The analog input buffer isolates the internal switching of the on-chip track-and-hold from disturbing the signal source as well as providing a high-impedance input. Two output modes are available for the output data – it can be decimated by two or the data can be output in burst mode. The burst mode output is designed specifically for DPD feedback applications where high resolution output data is available for a short period of time. Designed for high SFDR, the ADC has low-noise performance and outstanding spurious-free dynamic range over a large input-frequency range. The device is available in a 196pin BGA package and is specified over the full industrial temperature range (–40°C to 85°C).
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | Dual Channel 12-Bit 500Msps Receiver and Feedback IC datasheet (Rev. B) | 2014年 1月 8日 | |
Application note | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 2015年 5月 22日 | ||
Application note | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 2013年 7月 19日 | ||
User guide | ADS540x and ADS54T0x Evaluation Module | 2012年 6月 28日 | ||
More literature | TI and Xilinx Ease Design Process with Compatible Evaluation Tools | 2011年 4月 25日 |
設計與開發
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ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
支援產品和硬體
產品
精密度運算放大器 (Vos<1mV)
一般用途運算放大器
音訊運算放大器
轉阻放大器
高速運算放大器 (GBW ≥ 50 MHz)
功率運算放大器
視訊放大器
線路驅動器
轉導放大器與雷射驅動器
全差分放大器
精確 ADC
生物感測 AFE
高速 ADC (≥10 MSPS)
接收器
觸控式螢幕控制器
差分放大器
儀器放大器
音訊線路接收器
類比電流感測放大器
數位電源監測器
配備整合式分流電阻器的類比電流感測放大器
具整合式分流電阻器的數位電源監測器
晶粒與晶圓服務
SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)
支援產品和硬體
產品
接收器
高速 ADC (≥10 MSPS)
硬體開發
開發板
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
NFBGA (ZAY) | 196 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。