TLV1578
- Fast Throughput Rate: 1.25 MSPS at 5 V,
625 KSPS at 3 V - Wide Analog Input: 0 V to AVDD
- Differential Nonlinearity Error: < ± 1 LSB
- Integral Nonlinearity Error: < ± 1 LSB
- 8-to-1 Analog MUX - TLV1578
- Internal OSC
- Single 2.7-V to 5.5-V Supply Operation
- Low Power: 12 mW at 3 V and 35 mW at 5 V
- Auto Power Down of 1 mA Max
- Software Power Down: 10 uA Max
- Hardware Configurable
- DSP and Microcontroller Compatible Parallel Interface
- Binary/Twos Complement Output
- Hardware Controlled Extended Sampling
- Channel Sweep Mode Operation and Channel Select
- Hardware or Software Start of Conversion
- Applications
- Mass Storage and HDD
- Automotive
- Digital Servos
- Process Control
- General-Purpose DSP
- Image Sensor Processing
The TLV1571/1578 is a 10-bit data acquisition system that combines an 8-channel input multiplexer (MUX), a high-speed 10-bit ADC, and a parallel interface. The device contains two on-chip control registers allowing control of channel selection, software conversion start, and power down via the bidirectional parallel port. The control registers can be set to a default mode by applying a dummy RD\ signal when WR\ is tied low. This allows the TLV1571/1578 to be configured by hardware. The MUX is independently accessible. This allows the user to insert a signal conditioning circuit such as an antialiasing filter or an amplifier, if required, between the MUX and the ADC. Therefore, one signal conditioning circuit can be used for all eight channels. The TLV1571 is a single channel analog input device with all the same functions as the TLV1578.
The TLV1571/TLV1578 operates from a single 2.7-V to 5.5-V power supply. It accepts an analog input range from 0 V to AVDD and digitizes the input at a maximum 1.25 MSPS throughput rate at 5 V. The power dissipations are only 12 mW with a 3-V supply or 35 mW with a 5-V supply. The device features an auto power-down mode that automatically powers down to 1 mA 50 ns after conversion is performed. In software power-down mode, the ADC is further powered down to only 10 uA.
Very high throughput rate, simple parallel interface, and low power consumption make the TLV1571/TLV1578 an ideal choice for high-speed digital signal processing requiring multiple analog inputs.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | 2.7 V to 5.5 V, 1-/-8 Channel 10-Bit Parallel Analog-to-Digital Converters datasheet (Rev. D) | 2000年 7月 11日 | |
E-book | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015年 5月 21日 | ||
Application note | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 2011年 3月 17日 | ||
Application note | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 2010年 11月 10日 | ||
User guide | Characteristics, Operation, and Use of the TLV571/TLV157x EVM (Rev. A) | 2000年 11月 30日 | ||
Application note | Interfacing the TLV1571/78 Analog-to-Digital Converter to the TMS320C542 DSP | 1999年 10月 7日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
TSSOP (DA) | 32 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。