DS08MB200

現行

雙 800-Mbps 2:1/1:2 LVDS 多工器/緩衝器

產品詳細資料

Function Mux buffer Protocols BLVDS, CML, LVDS, LVPECL Number of transmitters 2, 4 Number of receivers 2, 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 800 Input signal BLVDS, CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Mux buffer Protocols BLVDS, CML, LVDS, LVPECL Number of transmitters 2, 4 Number of receivers 2, 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 800 Input signal BLVDS, CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
WQFN (RHS) 48 49 mm² 7 x 7
  • Up to 800 Mbps Data Rate per Channel
  • LVDS/BLVDS/CML/LVPECL Compatible Inputs, LVDS Compatible Outputs
  • Low Output Skew and Jitter
  • On-Chip 100Ω Input Termination
  • 15 kV ESD Protection on LVDS Inputs/Outputs
  • Hot Plug Protection
  • Single 3.3V Supply
  • Industrial –40 to +85°C Temperature Range
  • 48-pin WQFN Package

All trademarks are the property of their respective owners.

  • Up to 800 Mbps Data Rate per Channel
  • LVDS/BLVDS/CML/LVPECL Compatible Inputs, LVDS Compatible Outputs
  • Low Output Skew and Jitter
  • On-Chip 100Ω Input Termination
  • 15 kV ESD Protection on LVDS Inputs/Outputs
  • Hot Plug Protection
  • Single 3.3V Supply
  • Industrial –40 to +85°C Temperature Range
  • 48-pin WQFN Package

All trademarks are the property of their respective owners.

The DS08MB200 is a dual-port 1 to 2 repeater/buffer and 2 to 1 multiplexer. High-speed data paths and flow-through pinout minimize internal device jitter and simplify board layout. The differential inputs and outputs interface to LVDS or Bus LVDS signals such as those on TI’s 10-, 16-, and 18- bit Bus LVDS SerDes, or to CML or LVPECL signals.

The 3.3V supply, CMOS process, and robust I/O ensure high performance at low power over the entire industrial –40 to +85°C temperature range.

The DS08MB200 is a dual-port 1 to 2 repeater/buffer and 2 to 1 multiplexer. High-speed data paths and flow-through pinout minimize internal device jitter and simplify board layout. The differential inputs and outputs interface to LVDS or Bus LVDS signals such as those on TI’s 10-, 16-, and 18- bit Bus LVDS SerDes, or to CML or LVPECL signals.

The 3.3V supply, CMOS process, and robust I/O ensure high performance at low power over the entire industrial –40 to +85°C temperature range.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 1
類型 標題 日期
* Data sheet DS08MB200 Dual 800 Mbps 2:1/1:2 LVDS Mux/Buffer datasheet (Rev. D) 2013年 4月 6日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

DS08MB200 IBIS Model

SNLM088.ZIP (12 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
WQFN (RHS) 48 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片