DS1776QML

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產品詳細資料

Protocols Pi-Bus Rating Military Operating temperature range (°C) -55 to 125
Protocols Pi-Bus Rating Military Operating temperature range (°C) -55 to 125
LCCC (FK) 28 130.6449 mm² 11.43 x 11.43
  • Similar to BTL
  • Low Power ICCL = 41 mA max
  • B Output Controlled Ramp Rate
  • B input Noise Immunity, Typically 4 ns
  • Pin and Function Compatible with Signetics 54F776

All trademarks are the property of their respective owners.

  • Similar to BTL
  • Low Power ICCL = 41 mA max
  • B Output Controlled Ramp Rate
  • B input Noise Immunity, Typically 4 ns
  • Pin and Function Compatible with Signetics 54F776

All trademarks are the property of their respective owners.

The DS1776 is an octal PI-bus Transceiver. The A to B path is latched. B outputs are open collector with series Schottky diode, ensuring minimum B output loading. B outputs also have ramped rise and fall times (2.5 ns typical), ensuring minimum PI-bus ringing. B inputs have glitch rejection circuitry, 4 ns typical.

Designed using Texas Instruments’s Bi-CMOS process for both low operating and disabled power. AC performance is optimized for the PI-Bus inter-operability requirements.

The DS1776 is an octal latched transceiver and is intended to provide the electrical interface to a high performance wired-or bus. This bus has a loaded characteristic impedance range of 20Ω to 50Ω and is terminated on each end with a 30Ω to 40Ω resistor.

The DS1776 is an octal bidirectional transceiver with open collector B and TRI-STATE A port output drivers. A latch function is provided for the A port signals. The B port output driver is designed to sink 100 mA from 2V and features a controlled linear ramp to minimize crosstalk and ringing on the bus.

A separate high level control voltage (VX) is provided to prevent the A side output high level from exceeding future high density processor supply voltage levels. For 5V systems, VX is tied to VCC.

The DS1776 is an octal PI-bus Transceiver. The A to B path is latched. B outputs are open collector with series Schottky diode, ensuring minimum B output loading. B outputs also have ramped rise and fall times (2.5 ns typical), ensuring minimum PI-bus ringing. B inputs have glitch rejection circuitry, 4 ns typical.

Designed using Texas Instruments’s Bi-CMOS process for both low operating and disabled power. AC performance is optimized for the PI-Bus inter-operability requirements.

The DS1776 is an octal latched transceiver and is intended to provide the electrical interface to a high performance wired-or bus. This bus has a loaded characteristic impedance range of 20Ω to 50Ω and is terminated on each end with a 30Ω to 40Ω resistor.

The DS1776 is an octal bidirectional transceiver with open collector B and TRI-STATE A port output drivers. A latch function is provided for the A port signals. The B port output driver is designed to sink 100 mA from 2V and features a controlled linear ramp to minimize crosstalk and ringing on the bus.

A separate high level control voltage (VX) is provided to prevent the A side output high level from exceeding future high density processor supply voltage levels. For 5V systems, VX is tied to VCC.

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類型 標題 日期
* Data sheet DS1776QML Pi-Bus Transceiver datasheet (Rev. B) PDF | HTML 2015年 6月 23日

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點