DS25MB200
- 0.6–2.5 Gbps Low Jitter Operation
- Fixed Input Equalization
- Programmable Output Pre-Emphasis
- Independent Switch and Line Side Pre-Emphasis Controls
- Programmable Switch-Side Loopback Modes
- On-Chip Terminations
- HBM ESD Rating 6 kV on All Pins
- +3.3V Supply
- Lead-Less WQFN-48 Package (7mm x 7mm x 0.8mm, 0.5mm Pitch)
- -40°C to +85°C Operating Temperature Range
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The DS25MB200 is a dual signal conditioning 2:1 multiplexer and 1:2 fan-out buffer designed for use in backplane redundancy applications. Signal conditioning features include input equalization and programmable output pre-emphasis that enable data communication in FR4 backplanes up to 2.5 Gbps. Each input stage has a fixed equalizer to reduce ISI distortion from board traces. All output drivers have 4 selectable steps of pre-emphasis to compensate for transmission losses from long FR4 backplanes and reduce deterministic jitter. The pre-emphasis levels can be independently controlled for the line-side and switch-side drivers. The internal loopback paths from switch-side input to switch-side output enable at-speed system testing. All receiver inputs are internally terminated with 100Ω differential terminating resistors. All drivers are internally terminated with 50Ω to VCC.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DS25MB200 Dual 2.5Gbps 2:1/1:2 CML Mux/Buff w/Transmit Pre-Empha & Rcve Equal datasheet (Rev. G) | 2013年 4月 14日 | |
| Application note | AN-1821 CPRI Repeater System (Rev. A) | 2013年 4月 26日 | ||
| User guide | Dual 2.5 Gb s 1:2 Mux Buffer with Input Equalization and Output Pre-emphasis | 2012年 1月 25日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (NJU) | 48 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點