DS26C32AMQML
- CMOS Design for Low Power
- ±0.2V Sensitivity Over Input Common Mode Voltage Range
- Input Fail-Safe Circuitry
- Inputs Won't Load Line When VCC = 0V
- Meets the Requirements of EIA Standard RS-422
- TRI-STATE Outputs for Connection to System Buses
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The DS26C32A is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS.
The DS26C32A has an input sensitivity of 200 mV over the common mode input voltage range of ±7V. The DS26C32A features internal pull-up and pull-down resistors which prevent output oscillation on unused channels.
The DS26C32A provides an enable and disable function common to all four receivers, and features TRI-STATE outputs with 6 mA source and sink capability. This product is pin compatible with the DS26LS32A and the AM26LS32.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | DS26C32AMQML Quad Differential Line Receiver datasheet (Rev. A) | 2013年 4月 15日 | |
* | SMD | DS26C32AMQML SMD 5962-91640 | 2016年 6月 21日 | |
More literature | Die D/S DS26C32A MD8 Quad Differential Line Receiver | 2012年 9月 7日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
CDIP (NFE) | 16 | Ultra Librarian |
CFP (NAC) | 16 | Ultra Librarian |
CFP (NAD) | 16 | Ultra Librarian |
DIESALE (Y) | — | |
LCCC (NAJ) | 20 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點