DS26F32MQML
- Input Voltage Range of ±7.0V (Differential or Common Mode) ±0.2V Sensitivity over the Input Voltage Range
- High Input Impedance
- Operation from Single +5.0V Supply
- Input Pull-Down Resistor Prevents Output Oscillation on Unused Channels
- TRI-STATE Outputs, with Choice of Complementary Enables, for Receiving Directly onto a Data Bus
All trademarks are the property of their respective owners.
The DS26F32 is a quad differential line receiver designed to meet the requirements of EIA Standards RS-422 and RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission.
The DS26F32 offers improved performance due to the use of state-of-the-art L-FAST bipolar technology. The L-FAST technology allows for higher speeds and lower currents by utilizing extremely short gate delay times. Thus, the DS26F32 features lower power, extended temperature range, and improved specifications.
The device features an input sensitivity of 200 mV over the input common mode range of ±7.0V. The DS26F32 provides an enable function common to all four receivers and TRI-STATE outputs with 8.0 mA sink capability. Also, a fail-safe input/output relationship keeps the outputs high when the inputs are open.
The DS26F32 offers optimum performance when used with the DS26F31 Quad Differential Line Driver.
您可能會感興趣的類似產品
功能與所比較的裝置相似
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | DS26F32MQML Quad Differential Line Receivers datasheet (Rev. A) | 2013年 4月 15日 | |
* | SMD | DS26F32MQML SMD 5962-78020 | 2016年 6月 21日 | |
Application note | AN-903 A Comparison of Differential Termination Techniques (Rev. B) | 2013年 4月 26日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
CFP (NAD) | 16 | Ultra Librarian |
LCCC (NAJ) | 20 | Ultra Librarian |
WAFERSALE (YS) | — |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。