DS34LV86T
- Low Power CMOS Design (30 mW Typical)
- Interoperable With Existing 5V RS-422 Networks
- Industrial Temperature Range
- Meets TIA/EIA-422-B (RS-422) and ITU-T V.11 Recommendation
- 3.3V Operation
- ±7V Common Mode Range @ VID = 3V
- ±10V Common Mode Range @ VID = 0.2V
- Receiver OPEN Input Failsafe Feature
- Ensured AC Parameter:
- Maximum Receiver Skew: 4 ns
- Transition Time: 10 ns
- Pin Compatible With DS34C86T
- 32 MHz Toggle Frequency
- >6.5k ESD Tolerance (HBM)
- Available in SOIC Packaging
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The DS34LV86T is a high speed quad differential CMOS receiver that meets the requirements of both TIA/EIA-422-B and ITU-T V.11. The CMOS DS34LV86T features typical low static ICC of 9 mA which makes it ideal for battery powered and power conscious applications. The Tri-State enables, EN, allow the device to be disabled when not in use to minimize power consumption. The dual enable scheme allows for flexibility in turning receivers on and off.
The receiver output (RO) is ensured to be High when the inputs are left open. The receiver can detect signals as low as ±200 mV over the common mode range of ±10V. The receiver outputs (RO) are compatible with TTL and LVCMOS levels.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DS34LV86T 3V Enhanced CMOS Quad Differential Line Receiver datasheet (Rev. D) | 2013年 4月 15日 | |
| Application note | AN-903 A Comparison of Differential Termination Techniques (Rev. B) | 2013年 4月 26日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
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