DS90CR218A
- 12 to 85 MHz Shift Clock Support
- 50% Duty Cycle on Receiver Output Clock
- Low Power Consumption
- ±1V Common-mode Range (Around +1.2V)
- Narrow Bus Reduces Cable Size and Cost
- Up to 1.785 Gbps Throughput
- Up to 223 Mbytes/sec Bandwidth
- 345 mV (typ) Swing LVDS Devices for Low EMI
- PLL Requires No External Components
- Rising Edge Data Strobe
- Compatible with TIA/EIA-644 LVDS Standard
- Low Profile 48-Lead TSSOP Package
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The DS90CR218A receiver deserializes three input LVDS data streams into 21 bits of CMOS/TTL output data. When operating at the maximum input clock rate of 85 Mhz, the LVDS data is received at 595 Mbps per data channel for a total data throughput of 1.785 Gbit/sec (233 Mbytes/sec).
The narrow bus and LVDS signalling of the DS90CR218A is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces.
技術文件
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檢視所有 7 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DS90CR218A 3.3VRising Edge Data Strobe LVDS 21Bit Chan Link 12MHz to 85MHz datasheet (Rev. D) | 2013年 4月 22日 | |
| Application note | High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs | 2018年 11月 9日 | ||
| Application note | Receiver Skew Margin for Channel Link I and FPD Link I Devices | 2016年 1月 13日 | ||
| Application note | AN-1538 Interfacing Nationals DS90CR218A and LM98714 (Rev. C) | 2013年 4月 26日 | ||
| Design guide | Channel Link I Design Guide | 2007年 3月 29日 | ||
| Application note | Multi-Drop Channel-Link Operation | 2004年 10月 4日 | ||
| Application note | CHANNEL LINK Moving and Shaping Information In Point-To-Point Applications | 1998年 10月 5日 |
設計與開發
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模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (DGG) | 48 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點
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