DS90LT012AH
- –40°C to +125°C Temperature Range Operation
- Compatible With ANSI TIA/EIA-644-A Standard
- >400-Mbps (200-MHz) Switching Rates
- 100-ps Differential Skew (Typical)
- 3.5-ns Maximum Propagation Delay
- Integrated Line Termination Resistor (100 Ω Typical)
- Single 3.3-V Power Supply Design (2.7-V to 3.6-V Range)
- Power-Down High Impedance on LVDS Inputs
- LVDS Inputs Accept LVDS/CML/LVPECL Signals
- Pinout Simplifies PCB Layout
- Low Power Dissipation (10 mW Typical at 3.3-V Static)
- 5-Pin SOT-23 Package
The DS90LT012AH is a single CMOS differential line receiver designed for applications requiring ultra-low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Swing (LVDS) technology
The DS90LT012AH accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The DS90LT012AH includes an input line termination resistor for point-to-point applications.
The DS90LT012AH and companion LVDS line driver DS90LV011AH provide a new alternative to high power PECL/ECL devices for high-speed interface applications.
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檢視所有 3 類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | DS90LT012AH high temperature 3-V LVDS differential line receiver datasheet (Rev. B) | PDF | HTML | 2019年 1月 10日 |
Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 2018年 8月 3日 | ||
Application note | An Overview of LVDS Technology | 1998年 10月 5日 |
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封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOT-23 (DBV) | 5 | Ultra Librarian |
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