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LVDS、M-LVDS 和 PECL IC

DS90LV031A

現行

3-V 四 CMOS 差動線路驅動器

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產品規格表

DS90LV031A

現行
產品規格表 立即訂購

產品詳細資料

Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVCMOS, LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVCMOS, LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • >400-Mbps (200-MHz) Switching Rates
  • 0.1-ns Typical Differential Skew
  • 0.4-ns Maximum Differential Skew
  • 2-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • ±350-mV Differential Signaling
  • Low Power Dissipation (13-mW at 3.3-V Static)
  • Interoperable With Existing 5-V LVDS Devices
  • Compatible With IEEE 1596.3 SCI LVDS Standard
  • Compatible With TIA/EIA-644 LVDS Standard
  • Industrial Operating Temperature Range
  • Available in SOIC and TSSOP Surface-Mount Packaging
  • >400-Mbps (200-MHz) Switching Rates
  • 0.1-ns Typical Differential Skew
  • 0.4-ns Maximum Differential Skew
  • 2-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • ±350-mV Differential Signaling
  • Low Power Dissipation (13-mW at 3.3-V Static)
  • Interoperable With Existing 5-V LVDS Devices
  • Compatible With IEEE 1596.3 SCI LVDS Standard
  • Compatible With TIA/EIA-644 LVDS Standard
  • Industrial Operating Temperature Range
  • Available in SOIC and TSSOP Surface-Mount Packaging

The DS90LV031A is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV031A accepts low voltage LVTTL or LVCMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE® function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 13 mW typical.

The EN and EN* inputs allow active Low or active High control of the TRI-STATE outputs. The enables are common to all four drivers. The DS90LV031A and companion line receiver (DS90LV032A) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.

The DS90LV031A is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV031A accepts low voltage LVTTL or LVCMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE® function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 13 mW typical.

The EN and EN* inputs allow active Low or active High control of the TRI-STATE outputs. The enables are common to all four drivers. The DS90LV031A and companion line receiver (DS90LV032A) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.
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類型 標題 日期
* Data sheet DS90LV031A 3-V LVDS Quad CMOS Differential Line Driver datasheet (Rev. D) PDF | HTML 2016年 8月 25日
Application note AN-1110 LVDS Quad Dynamic I CC vs Frequency 2004年 5月 15日
Application note An Overview of LVDS Technology 1998年 10月 5日

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開發板

DS90LV047-48AEVM — DS90LV047-48AEVM 評估模組

The DS90LV047-48AEVM is an evaluation module (EVM) designed for performance and functional evaluation of Texas Instruments' DS90LV047A 3-V LVDS quad CMOS differential line driver and DS90LV048A 3-V LVDS CMOS differential line receiver. With this kit, users can quickly evaluate the output (...)
使用指南: PDF
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DS90LV031A IBIS Model

SNLM020.ZIP (13 KB) - IBIS Model
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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
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