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LVDS、M-LVDS 和 PECL IC

DS90LV032A

現行

3-V 400-Mbps LVDS 四差動線路接收器

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產品規格表

DS90LV032A

現行
產品規格表 立即訂購

產品詳細資料

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVCMOS Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVCMOS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • >400 Mbps (200 MHz) Switching Rates
  • 0.1-ns Channel-to-Channel Skew (Typical)
  • 0.1-ns Differential Skew (Typical)
  • 3.3-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • Power Down High Impedance on LVDS Inputs
  • Low Power Design (40 mW at 3.3 V Static)
  • Interoperable With Existing 5-V LVDS Networks
  • Accepts Small Swing (350 mV Typical) VID
  • Supports Open, Short, and Terminated Input Fail-Safe
  • Compatible With ANSI/TIA/EIA-644
  • Industrial Temperature Operating Range (–40°C to 85°C)
  • Available in SOIC and TSSOP Packaging
  • >400 Mbps (200 MHz) Switching Rates
  • 0.1-ns Channel-to-Channel Skew (Typical)
  • 0.1-ns Differential Skew (Typical)
  • 3.3-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • Power Down High Impedance on LVDS Inputs
  • Low Power Design (40 mW at 3.3 V Static)
  • Interoperable With Existing 5-V LVDS Networks
  • Accepts Small Swing (350 mV Typical) VID
  • Supports Open, Short, and Terminated Input Fail-Safe
  • Compatible With ANSI/TIA/EIA-644
  • Industrial Temperature Operating Range (–40°C to 85°C)
  • Available in SOIC and TSSOP Packaging

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100 Ω) input Fail-safe. The receiver output is HIGH for all fail-safe conditions.

The DS90LV032A and companion LVDS line driver (for example, DS90LV031A) provide a new alternative to high power PECL or ECL devices for high speed point-to-point interface applications.

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.

The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100 Ω) input Fail-safe. The receiver output is HIGH for all fail-safe conditions.

The DS90LV032A and companion LVDS line driver (for example, DS90LV031A) provide a new alternative to high power PECL or ECL devices for high speed point-to-point interface applications.
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類型 標題 日期
* Data sheet DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver datasheet (Rev. D) PDF | HTML 2016年 8月 24日
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018年 8月 3日
Application brief How to Terminate LVDS Connections with DC and AC Coupling 2018年 5月 16日
More literature Die D/S DS90LV032A MDS (PRELIMINARY) 3V LVDS Quad CMOS Diff Line Receive 2012年 12月 20日
Application note AN-1110 LVDS Quad Dynamic I CC vs Frequency 2004年 5月 15日
Application note An Overview of LVDS Technology 1998年 10月 5日

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開發板

DS90LV047-48AEVM — DS90LV047-48AEVM 評估模組

The DS90LV047-48AEVM is an evaluation module (EVM) designed for performance and functional evaluation of Texas Instruments' DS90LV047A 3-V LVDS quad CMOS differential line driver and DS90LV048A 3-V LVDS CMOS differential line receiver. With this kit, users can quickly evaluate the output (...)
使用指南: PDF
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模擬型號

DS90LV032A IBIS Model

SNLM021.ZIP (12 KB) - IBIS Model
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
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