HD3SS3411
- Compatible with Multiple Interface Standards
Including FPD Link, LVDS, PCIE Gen II, III, XAUI,
and USB3.1 - Operates up to 10 Gbps
- Wide –3 dB Differential BW of ∼ 7.5 GHz
- Excellent Dynamic Characteristics (at 4 GHz)
- Insertion Loss = –1.1 dB
- Return Loss = –11.3 dB
- Off Isolation = –19 dB
- Bidirectional "Mux/De-Mux" Differential Switch
- Supports Common Mode Voltage 0 V to 2 V
- Single Supply Voltage VCC of 3.3 V ±10%
- Industrial Temperature Range of –40°C to 105°C
The HD3SS3411 is a high-speed bi-directional passive switch in multiplexer or demultiplexer configurations. Based on control pin SEL, the device provides switching of differential channels between Port B to Port A or Port C to Port A.
The HD3SS3411 is a generic analog differential passive switch that can work for any high speed interface application as long as it is biased at a common mode voltage range of 0 V to 2 V and has differential signaling with differential amplitude up to 1800 mVpp. The device employs adaptive tracking that ensures the channel remains unchanged for entire common mode voltage range.
Excellent dynamic characteristics of the device allow high speed switching with minimum
attenuation to the signal eye diagram with little added jitter. It consumes < 2 mW of power when
operational and has a shutdown mode exercisable by OEn pin resulting
< 2 µW.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | HD3SS3411 One Channel Differential 2:1 Mux/Demux datasheet | PDF | HTML | 2015年 11月 10日 |
* | Radiation & reliability report | PCI-e Reference Clock Measurement with Multiplexers | PDF | HTML | 2022年 6月 29日 |
Application note | Passive Mux Selection Based On Bandwidth (Rev. A) | PDF | HTML | 2024年 7月 31日 | |
Application note | High-Speed Layout Guidelines for Signal Conditioners and USB Hubs | 2018年 6月 14日 | ||
EVM User's guide | HD3SS3411 EVM User's Guide | 2015年 6月 16日 |
設計與開發
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HD3SS3411RWAEVM — HD3SS3411RWAEVM 評估模組
The HD3SS3411 is a high speed passive switch capable of switching differential channels between Port A to Ports B or C based on the state of control pin SEL. The interface to the EVM consists of standard SMP connectors to interface the EVM to test equipment or adapter boards to use in a (...)
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
WQFN (RWA) | 14 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。