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AC/DC 和 DC/DC 轉換器 (整合式 FET)

LM26400Y

現行

雙 2A、500kHz 寬輸入範圍降壓穩壓器

立即訂購
產品規格表

LM26400Y

現行
產品規格表 立即訂購

產品詳細資料

Rating Catalog Operating temperature range (°C) -40 to 125 Topology Buck Type Converter Iout (max) (A) 2 Vin (min) (V) 3 Vin (max) (V) 20 Switching frequency (min) (kHz) 500 Switching frequency (max) (kHz) 500 Features Enable, Light Load Efficiency, Power good, Pre-Bias Start-Up Control mode current mode Vout (min) (V) 0.6 Vout (max) (V) 16 Iq (typ) (µA) 4000 Duty cycle (max) (%) 96
Rating Catalog Operating temperature range (°C) -40 to 125 Topology Buck Type Converter Iout (max) (A) 2 Vin (min) (V) 3 Vin (max) (V) 20 Switching frequency (min) (kHz) 500 Switching frequency (max) (kHz) 500 Features Enable, Light Load Efficiency, Power good, Pre-Bias Start-Up Control mode current mode Vout (min) (V) 0.6 Vout (max) (V) 16 Iq (typ) (µA) 4000 Duty cycle (max) (%) 96
HTSSOP (PWP) 16 32 mm² 5 x 6.4 WSON (NHQ) 16 25 mm² 5 x 5
  • Input Voltage Range of 3 V to 20 V
  • Dual 2-A Output
  • Output Voltage Down to 0.6 V
  • Internal Compensation
  • 500-kHz PWM Frequency
  • Separate Enable Pins
  • Separate Soft-Start Pins
  • Frequency Foldback Protection
  • 175-mΩ NMOS Switch
  • Integrated Bootstrap Diodes
  • Overcurrent Protection
  • HTSSOP and WSON Packages
  • Thermal Shutdown
  • Input Voltage Range of 3 V to 20 V
  • Dual 2-A Output
  • Output Voltage Down to 0.6 V
  • Internal Compensation
  • 500-kHz PWM Frequency
  • Separate Enable Pins
  • Separate Soft-Start Pins
  • Frequency Foldback Protection
  • 175-mΩ NMOS Switch
  • Integrated Bootstrap Diodes
  • Overcurrent Protection
  • HTSSOP and WSON Packages
  • Thermal Shutdown

The LM26400Y device is a monolithic, two-output fixed-frequency PWM step-down DC-DC regulator, in a 16-pin WSON or thermally-enhanced HTSSOP package. With a minimum number of external components and internal loop compensation, the LM26400Y is easy to use.

The ability to drive 2-A loads with an internal 175-mΩ NMOS switch using state-of-the-art 0.5-µm BiCMOS technology results in a high-power density design. The world class control circuitry allows for an ON-time as low as 40 ns, thus supporting high-frequency conversion over the entire input range of 3 V to 20 V and down to an output voltage of only 0.6 V. The LM26400Y utilizes peak current-mode control and internal compensation to provide high-performance regulation over a wide range of line and load conditions. Switching frequency is internally set to 500 kHz, optimal for a broad range of applications in terms of size versus thermal tradeoffs.

Given a nonsynchronous architecture, efficiencies above 90% are easy to achieve. External shutdown is included, enabling separate turnon and turnoff of the two channels. Additional features include programmable soft-start circuitry to reduce inrush current, pulse-by-pulse current limit and frequency foldback, integrated bootstrap structure, and thermal shutdown.

The LM26400Y device is a monolithic, two-output fixed-frequency PWM step-down DC-DC regulator, in a 16-pin WSON or thermally-enhanced HTSSOP package. With a minimum number of external components and internal loop compensation, the LM26400Y is easy to use.

The ability to drive 2-A loads with an internal 175-mΩ NMOS switch using state-of-the-art 0.5-µm BiCMOS technology results in a high-power density design. The world class control circuitry allows for an ON-time as low as 40 ns, thus supporting high-frequency conversion over the entire input range of 3 V to 20 V and down to an output voltage of only 0.6 V. The LM26400Y utilizes peak current-mode control and internal compensation to provide high-performance regulation over a wide range of line and load conditions. Switching frequency is internally set to 500 kHz, optimal for a broad range of applications in terms of size versus thermal tradeoffs.

Given a nonsynchronous architecture, efficiencies above 90% are easy to achieve. External shutdown is included, enabling separate turnon and turnoff of the two channels. Additional features include programmable soft-start circuitry to reduce inrush current, pulse-by-pulse current limit and frequency foldback, integrated bootstrap structure, and thermal shutdown.
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類型 標題 日期
* Data sheet LM26400Y Dual 2-A, 500-kHz Wide Input Range Buck Regulator datasheet (Rev. D) PDF | HTML 2015年 10月 13日
User guide LM26400Y Step-Down Converter Evaluation Module User's Guide (Rev. B) PDF | HTML 2021年 12月 20日
Selection guide Power Management Guide 2018 (Rev. R) 2018年 6月 25日
White paper Powering Multi-Rail Systems Using the LM26400Y Regulator 2008年 1月 28日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DCA1000EVM — 用於即時數據擷取和串流的 DCA1000 評估模組

DCA1000 評估模組 (EVM) 可針對來自 TI AWR 和 IWR 雷達感測器 EVM 的雙通道和四通道低電壓差動訊號 (LVDS) 流量，提供即時數據擷取和串流功能。數據可透過 1-Gbps 乙太網路即時串流到執行 MMWAVE-Studio 工具的 PC，以進行擷取、視覺化，然後可傳送至選擇的應用，以處理數據和開發演算法。

使用指南: PDF
TI.com 無法提供
開發板

LM26400YEVAL — 雙路 2A、500 kHz 寬輸入範圍降壓穩壓器

The LM26400Y demonstration board was designed to provide two 2A outputs at 1.2V and 2.5V respectively. It uses the ETSSOP package option of the LM26400Y for easier probing. The design emphasizes on the compactness of the LM26400Y PCB layout and is thermally optimized. The total solution size is (...)

使用指南: PDF | HTML
TI.com 無法提供
參考設計

TIDA-00431 — 採用 8 GHz DC 耦合差動放大器的射頻取樣 4 GSPS ADC 參考設計

Wideband radio frequency (RF) receivers allow greatly increased flexibility in radio designs. The wide instantaneous bandwidth allows flexible tuning without changing hardware and the ability to capture multiple channels at widely separated frequencies.

This reference design describes a wideband RF (...)

Design guide: PDF
電路圖: PDF
參考設計

TIDA-00826 — 50 Ohm 2 GHz 示波器前端參考設計

This reference design is part of an analog front-end for 50Ω-input oscilloscope application. System designers can readily use this evaluation platform to process input signals from DC to 2 GHz in both frequency-domain and time-domain applications.
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00432 — 使用適用於相位陣列雷達系統的 Xilinx 平台，將 JESD204B Giga-Sample ADC 同步化

This system level design shows how two ADC12J4000 evaluation modules (EVMs) can be synchronized together using a Xilinx VC707 platform. The design document describes the required hardware modifications and device configurations, including the clocking scheme. Example configuration files are shown (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
HTSSOP (PWP) 16 Ultra Librarian
WSON (NHQ) 16 Ultra Librarian
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