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AC/DC 和 DC/DC 控制器 (外部 FET)

LM5115A

現行

具通電/斷電追蹤的 75V 二次側後置穩壓器/同步降壓穩壓器

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產品規格表

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功能相同，但引腳輸出與所比較的裝置不同
LM5141 現行 低 Iq、寬輸入範圍雙同步降壓控制器 Optional spread spectrum for improved EMI.

LM5115A

現行
產品規格表 立即訂購

產品詳細資料

Vin (min) (V) 4.5 Vin (max) (V) 75 Operating temperature range (°C) -40 to 125 Control mode current mode Topology Buck Rating Catalog Vout (min) (V) 0.75 Vout (max) (V) 13.5 Features Frequency synchronization, Power good Duty cycle (max) (%) 85 Number of phases 1
Vin (min) (V) 4.5 Vin (max) (V) 75 Operating temperature range (°C) -40 to 125 Control mode current mode Topology Buck Rating Catalog Vout (min) (V) 0.75 Vout (max) (V) 13.5 Features Frequency synchronization, Power good Duty cycle (max) (%) 85 Number of phases 1
TSSOP (PW) 16 32 mm² 5 x 6.4
  • Power-up/Power-down Tracking
  • Self-synchronization to Main Channel Output
  • Leading Edge Pulse Width Modulation
  • Valley Current Mode Control
  • Standalone DC/DC Synchronous Buck Mode
  • Operates from AC or DC Input up to 75V
  • Wide 4.5V to 30V Bias Supply Range
  • Wide 0.75V to 13.5V Output Range.
  • Top and Bottom Gate Drivers Sink 2.5A Peak
  • Adaptive Gate Driver Dead-time Control
  • Wide Bandwidth Error Amplifier (4MHz)
  • Programmable Soft-start
  • Thermal Shutdown Protection
  • TSSOP-16 Package

All trademarks are the property of their respective owners.

  • Power-up/Power-down Tracking
  • Self-synchronization to Main Channel Output
  • Leading Edge Pulse Width Modulation
  • Valley Current Mode Control
  • Standalone DC/DC Synchronous Buck Mode
  • Operates from AC or DC Input up to 75V
  • Wide 4.5V to 30V Bias Supply Range
  • Wide 0.75V to 13.5V Output Range.
  • Top and Bottom Gate Drivers Sink 2.5A Peak
  • Adaptive Gate Driver Dead-time Control
  • Wide Bandwidth Error Amplifier (4MHz)
  • Programmable Soft-start
  • Thermal Shutdown Protection
  • TSSOP-16 Package

All trademarks are the property of their respective owners.

The LM5115A controller contains all of the features necessary to produce multiple tracking outputs using the Secondary Side Post Regulation (SSPR) technique. The SSPR technique develops a highly efficient and well regulated auxiliary output from the secondary side switching waveform of an isolated power converter. LM5115A can be also used as a standalone DC/DC synchronous buck controller (Refer to section). Regulation of the auxiliary output voltage is achieved by leading edge pulse width modulation (PWM) of the main channel duty cycle. Leading edge modulation is compatible with either current mode or voltage mode control of the main output. The LM5115A drives external high-side and low-side NMOS power switches configured as a synchronous buck regulator. A current sense amplifier provides overload protection and operates over a wide common mode input range. Additional features include a low dropout (LDO) bias regulator, error amplifier, precision reference, adaptive dead time control of the gate signals and thermal shutdown.

The LM5115A controller contains all of the features necessary to produce multiple tracking outputs using the Secondary Side Post Regulation (SSPR) technique. The SSPR technique develops a highly efficient and well regulated auxiliary output from the secondary side switching waveform of an isolated power converter. LM5115A can be also used as a standalone DC/DC synchronous buck controller (Refer to section). Regulation of the auxiliary output voltage is achieved by leading edge pulse width modulation (PWM) of the main channel duty cycle. Leading edge modulation is compatible with either current mode or voltage mode control of the main output. The LM5115A drives external high-side and low-side NMOS power switches configured as a synchronous buck regulator. A current sense amplifier provides overload protection and operates over a wide common mode input range. Additional features include a low dropout (LDO) bias regulator, error amplifier, precision reference, adaptive dead time control of the gate signals and thermal shutdown.
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類型 標題 日期
* Data sheet Secondary Side Post Regulator/DC-DC Converter with Power-up/Power-down Tracking datasheet (Rev. B) 2013年 3月 26日
Application note Minimizing FET Losses For a High Input Rail Buck Converter (Rev. A) 2013年 4月 23日

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TSSOP (PW) 16 Ultra Librarian
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