LP2950

現行

具低 IQ 的 100-mA、30-V、低壓降電壓穩壓器

產品詳細資料

Output options Fixed Output Iout (max) (A) 0.1 Vin (max) (V) 30 Vin (min) (V) 2 Vout (max) (V) 5 Vout (min) (V) 3 Fixed output options (V) 3, 3.3, 5 Rating Catalog Noise (µVrms) 100 PSRR at 100 KHz (dB) 57 Iq (typ) (mA) 0.075 Thermal resistance θJA (°C/W) 97 Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Accuracy (%) 3 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
Output options Fixed Output Iout (max) (A) 0.1 Vin (max) (V) 30 Vin (min) (V) 2 Vout (max) (V) 5 Vout (min) (V) 3 Fixed output options (V) 3, 3.3, 5 Rating Catalog Noise (µVrms) 100 PSRR at 100 KHz (dB) 57 Iq (typ) (mA) 0.075 Thermal resistance θJA (°C/W) 97 Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Accuracy (%) 3 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
TO-92 (LP) 3 19.136 mm² 5.2 x 3.68
  • Wide input voltage range
    • VIN range : 2V to 30V
  • Wide output voltage range VOUT
    • Fixed option: 3V (legacy Chip), 3.3V, 5.0V
    • Adjustable option: 1.2V to 29V
  • Output current: 100mA
  • VOUT accuracy:
    • ±2% over line, load, and temperature (legacy chip)
    • ±1% over line, load, and temperature (new chip)
  • Quiescent current IQ (new chip): 50µA (typical)
  • Low dropout (new chip):: 340mV (typical)
  • Output current limiting and thermal shutdown
  • Stable over a wide range of ceramic output capacitor values
    • COUT range: 1µF to 100µF (new chip)
    • ESR range: 0 to 2Ω (new chip)
  • Operating junction temperature: –40°C to 125°C
  • Package option:
    • LP (3-pin TO-92)
    • D (8-pin SOIC)
    • DRG (8-pin WSON)
  • Wide input voltage range
    • VIN range : 2V to 30V
  • Wide output voltage range VOUT
    • Fixed option: 3V (legacy Chip), 3.3V, 5.0V
    • Adjustable option: 1.2V to 29V
  • Output current: 100mA
  • VOUT accuracy:
    • ±2% over line, load, and temperature (legacy chip)
    • ±1% over line, load, and temperature (new chip)
  • Quiescent current IQ (new chip): 50µA (typical)
  • Low dropout (new chip):: 340mV (typical)
  • Output current limiting and thermal shutdown
  • Stable over a wide range of ceramic output capacitor values
    • COUT range: 1µF to 100µF (new chip)
    • ESR range: 0 to 2Ω (new chip)
  • Operating junction temperature: –40°C to 125°C
  • Package option:
    • LP (3-pin TO-92)
    • D (8-pin SOIC)
    • DRG (8-pin WSON)

The LP2951 is a wide input low-dropout regulator (LDO) supporting an input voltage range from 2V to 30V and can supply up to 100mA of load current. The LP2951 is able to output either a fixed or adjustable output from the same device. By tying the OUTPUT and SENSE pins together, and the FEEDBACK and VTAP pins together, the LP2951 gives 3.3V or 5V fixed output voltages. Alternatively, leave the SENSE and VTAP pins open and connect FEEDBACK to an external resistor divider. This configuration allows the output to be set to any value between 1.2V to 29V.

The LP2951-Q1 has a ERROR output that monitors the voltage at the feedback pin to indicate the status of the output voltage. The SHUTDOWN input and ERROR output are used for sequencing multiple power supplies in the system.

The LP2951 is a wide input low-dropout regulator (LDO) supporting an input voltage range from 2V to 30V and can supply up to 100mA of load current. The LP2951 is able to output either a fixed or adjustable output from the same device. By tying the OUTPUT and SENSE pins together, and the FEEDBACK and VTAP pins together, the LP2951 gives 3.3V or 5V fixed output voltages. Alternatively, leave the SENSE and VTAP pins open and connect FEEDBACK to an external resistor divider. This configuration allows the output to be set to any value between 1.2V to 29V.

The LP2951-Q1 has a ERROR output that monitors the voltage at the feedback pin to indicate the status of the output voltage. The SHUTDOWN input and ERROR output are used for sequencing multiple power supplies in the system.

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類型 標題 日期
* Data sheet LP295x 100-mA, 30-V, adjustable voltage regulator with shutdown datasheet (Rev. K) PDF | HTML 2024年 12月 13日
Application note LDO Noise Demystified (Rev. B) PDF | HTML 2020年 8月 18日
Application note ESR, Stability, and the LDO Regulator (Rev. A) 2020年 1月 7日
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 2017年 8月 9日
Application note AN-1815 LDOs Ease the Stress of Start-Up (Rev. A) 2013年 4月 24日
Application note 3.6V – 5.5V Input, LDO Reference Design for MSP430 (Rev. A) 2010年 6月 14日
Application note 3.6V – 5.5V Input, LDO with Dual-Level Output Reference Design for MSP430 (Rev. A) 2010年 6月 14日
Application note Packaging Limits Range of Linear Regulators 2010年 5月 8日
Application note Simple Power Solution Using LDOs for the DM365 (Rev. A) 2009年 9月 11日
Application note Digital Designer's Guide to Linear Voltage Regulators & Thermal Mgmt (LDO) (Rev. A) 2008年 6月 4日
Application note Ceramic Capacitors Replace Tantalum Capacitors in LDOs (Rev. A) 2006年 10月 13日
Application note Understanding LDO Dropout 2005年 5月 9日
Application note Extending the Input Voltage Range of an LDO Regulator 2002年 8月 16日
Application note Understanding the Terms and Definitions of LDO Voltage Regulators 1999年 10月 21日
Application note Technical Review of Low Dropout Voltage Regulator Operation And Performance 1999年 8月 30日
Application brief Low Power 150-mA LDO Linear Regulators. Extended Output Voltage Adjustment Range 1999年 6月 11日

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模擬型號

LP2950-33 PSpice Transient Model

SLVM953.ZIP (22 KB) - PSpice Model
封裝 針腳 CAD 符號、佔位空間與 3D 模型
TO-92 (LP) 3 Ultra Librarian

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  • 認證摘要
  • 進行中持續性的可靠性監測
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