LP38691-ADJ

現行

500-mA、10-V 可調式低壓降電壓穩壓器

產品詳細資料

Output options Adjustable Output Iout (max) (A) 0.5 Vin (max) (V) 10 Vin (min) (V) 2.7 Vout (max) (V) 9 Vout (min) (V) 1.25 Rating Catalog Noise (µVrms) 80 PSRR at 100 KHz (dB) 45 Iq (typ) (mA) 0.055 Thermal resistance θJA (°C/W) 51 Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Foldback Overcurrent protection Accuracy (%) 4 Dropout voltage (Vdo) (typ) (mV) 250 Operating temperature range (°C) -40 to 125
Output options Adjustable Output Iout (max) (A) 0.5 Vin (max) (V) 10 Vin (min) (V) 2.7 Vout (max) (V) 9 Vout (min) (V) 1.25 Rating Catalog Noise (µVrms) 80 PSRR at 100 KHz (dB) 45 Iq (typ) (mA) 0.055 Thermal resistance θJA (°C/W) 51 Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Foldback Overcurrent protection Accuracy (%) 4 Dropout voltage (Vdo) (typ) (mV) 250 Operating temperature range (°C) -40 to 125
WSON (NGG) 6 9 mm² 3 x 3
  • Wide Input Voltage Range: 2.7 V to 10 V
  • All WSON Options are Available as AEC-Q100 Grade 1
  • Output Voltage Range: 1.25 V to 9 V
  • 2% Adjust (ADJ) Pin Voltage Accuracy (25°C)
  • Low Dropout Voltage: 250 mV at 500 mA
    (Typical, 5-V Out)
  • Precision (Trimmed) Bandgap Reference
  • Ensured Specs for –40°C to 125°C
  • 1-µA Off-State Quiescent Current
  • Thermal Overload Protection
  • Foldback Current Limiting
  • Ground (GND) Pin Curent: 55 µA (Typical) at Full Load
  • Enable (EN) Pin (LP38693-ADJ)
  • Wide Input Voltage Range: 2.7 V to 10 V
  • All WSON Options are Available as AEC-Q100 Grade 1
  • Output Voltage Range: 1.25 V to 9 V
  • 2% Adjust (ADJ) Pin Voltage Accuracy (25°C)
  • Low Dropout Voltage: 250 mV at 500 mA
    (Typical, 5-V Out)
  • Precision (Trimmed) Bandgap Reference
  • Ensured Specs for –40°C to 125°C
  • 1-µA Off-State Quiescent Current
  • Thermal Overload Protection
  • Foldback Current Limiting
  • Ground (GND) Pin Curent: 55 µA (Typical) at Full Load
  • Enable (EN) Pin (LP38693-ADJ)

The LP3869x-ADJ low-dropout CMOS linear regulators provide 2% precision reference voltage, extremely low dropout voltage (250 mV at 500-mA load current, VOUT = 5 V), and excellent AC performance using ultra-low equivalent series resistance (ESR) ceramic output capacitors.

The low thermal resistance of the WSON and SOT-223 packages allow use of the full operating current even in high ambient temperature environments.

The use of a PMOS power transistor means that no DC base drive current is required to bias it, thus allowing the GND-pin current to remain below 100 µA regardless of load current, input voltage, or operating temperature.

For all available packages, see the orderable addendum at the end of the data sheet.

The LP3869x-ADJ low-dropout CMOS linear regulators provide 2% precision reference voltage, extremely low dropout voltage (250 mV at 500-mA load current, VOUT = 5 V), and excellent AC performance using ultra-low equivalent series resistance (ESR) ceramic output capacitors.

The low thermal resistance of the WSON and SOT-223 packages allow use of the full operating current even in high ambient temperature environments.

The use of a PMOS power transistor means that no DC base drive current is required to bias it, thus allowing the GND-pin current to remain below 100 µA regardless of load current, input voltage, or operating temperature.

For all available packages, see the orderable addendum at the end of the data sheet.

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* Data sheet LP3869x-ADJ/Q1 500-mA Low-Dropout CMOS Linear Regulators Stable With Ceramic Output Capacitors datasheet (Rev. K) PDF | HTML 2016年 1月 19日

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模擬型號

LP38691_ADJ PSpice Transient Model

SNVM589.ZIP (37 KB) - PSpice Model
模擬型號

LP38691_ADJ Unencrypted PSpice Transient Model

SNVMA73.ZIP (1 KB) - PSpice Model
封裝 針腳 CAD 符號、佔位空間與 3D 模型
WSON (NGG) 6 Ultra Librarian

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