LP38842-ADJ
- Ideal for Conversion From 1.8V or 1.5V Inputs
- Designed for Use With Low ESR Ceramic Capacitors
- Ultra Low Dropout Voltage (115mV at 1.5A typ)
- 0.56V to 1.5V Adjustable Output Range
- Load Regulation of 0.1%/A (typ)
- 30nA Quiescent Current in Shutdown (typ)
- Low Ground Pin Current at all Loads
- Over Temperature/Over Current Protection
- Available in 8 Lead SO PowerPAD Package
- −40°C to +125°C Junction Temperature Range
- UVLO Disables Output When VBIAS < 3.8V
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The LP38842-ADJ is a high current, fast response regulator which can maintain output voltage regulation with minimum input to output voltage drop. Fabricated on a CMOS process, the device operates from two input voltages: Vbias provides voltage to drive the gate of the N-MOS power transistor, while Vin is the input voltage which supplies power to the load. The use of an external bias rail allows the part to operate from ultra low Vin voltages. Unlike bipolar regulators, the CMOS architecture consumes extremely low quiescent current at any output load current. The use of an N-MOS power transistor results in wide bandwidth, yet minimum external capacitance is required to maintain loop stability.
The fast transient response of these devices makes them suitable for use in powering DSP, Microcontroller Core voltages and Switch Mode Power Supply post regulators. The parts are available in the SO PowerPAD package.
Dropout Voltage: 115 mV (typ) at 1.5A load current.
Quiescent Current: 30 mA (typ) at full load.
Shutdown Current: 30 nA (typ) when S/D pin is low.
Precision Reference Voltage: 1.5% room temperature accuracy.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | LP38842-ADJ 1.5A Ultra Low Dropout Adj Linear Reg Stable w/Ceramic Out Caps datasheet (Rev. A) | 2013年 4月 2日 |
設計與開發
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封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
HSOIC (DDA) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點