LP5912

現行

具有反向電流保護功能的 500-mA 低雜訊低 IQ 低壓差電壓穩壓器

產品詳細資料

Output options Fixed Output Iout (max) (A) 0.5 Vin (max) (V) 6.5 Vin (min) (V) 1.6 Vout (max) (V) 3.3 Vout (min) (V) 0.9 Fixed output options (V) 0.9, 1, 1.1, 1.2, 1.5, 1.8, 2.5, 2.8, 3, 3.3, 5 Noise (µVrms) 12 Iq (typ) (mA) 0.03 Thermal resistance θJA (°C/W) 71, 75.8 Rating Catalog Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Output discharge, Power good, Reverse Current Protection, Soft start Accuracy (%) 3 PSRR at 100 KHz (dB) 40 Dropout voltage (Vdo) (typ) (mV) 150 Operating temperature range (°C) -40 to 125
Output options Fixed Output Iout (max) (A) 0.5 Vin (max) (V) 6.5 Vin (min) (V) 1.6 Vout (max) (V) 3.3 Vout (min) (V) 0.9 Fixed output options (V) 0.9, 1, 1.1, 1.2, 1.5, 1.8, 2.5, 2.8, 3, 3.3, 5 Noise (µVrms) 12 Iq (typ) (mA) 0.03 Thermal resistance θJA (°C/W) 71, 75.8 Rating Catalog Load capacitance (min) (µF) 1 Regulated outputs (#) 1 Features Enable, Output discharge, Power good, Reverse Current Protection, Soft start Accuracy (%) 3 PSRR at 100 KHz (dB) 40 Dropout voltage (Vdo) (typ) (mV) 150 Operating temperature range (°C) -40 to 125
WSON (DRV) 6 4 mm² 2 x 2
  • Input Voltage Range: 1.6 V to 6.5 V
  • Output Voltage Range: 0.8 V to 5.5 V
  • Output Current up to 500 mA
  • Low Output-Voltage Noise: 12 µVRMS Typical
  • PSRR at 1 kHz: 75 dB Typical
  • Output Voltage Tolerance (VOUT ≥ 3.3 V): ±2%
  • Low IQ (Enabled, No Load): 30 µA Typical
  • Low Dropout (VOUT ≥ 3.3 V): 95 mV Typical at 500-mA Load
  • Stable With 1-µF Ceramic Input and Output Capacitors
  • Thermal-Overload and Short-Circuit Protection
  • Reverse Current Protection
  • No Noise Bypass Capacitor Required
  • Output Automatic Discharge for Fast Turnoff
  • Power-Good Output With 140-µs Typical Delay
  • Internal Soft-Start to Limit the In-rush Current
  • –40°C to +125°C Operating Junction Temperature Range
  • Input Voltage Range: 1.6 V to 6.5 V
  • Output Voltage Range: 0.8 V to 5.5 V
  • Output Current up to 500 mA
  • Low Output-Voltage Noise: 12 µVRMS Typical
  • PSRR at 1 kHz: 75 dB Typical
  • Output Voltage Tolerance (VOUT ≥ 3.3 V): ±2%
  • Low IQ (Enabled, No Load): 30 µA Typical
  • Low Dropout (VOUT ≥ 3.3 V): 95 mV Typical at 500-mA Load
  • Stable With 1-µF Ceramic Input and Output Capacitors
  • Thermal-Overload and Short-Circuit Protection
  • Reverse Current Protection
  • No Noise Bypass Capacitor Required
  • Output Automatic Discharge for Fast Turnoff
  • Power-Good Output With 140-µs Typical Delay
  • Internal Soft-Start to Limit the In-rush Current
  • –40°C to +125°C Operating Junction Temperature Range

The LP5912 is low-noise LDO that can supply up to 500 mA of output current. Designed to meet the requirements of RF and analog circuits, the LP5912 device provides low noise, high PSRR, low quiescent current, and low line and load transient response. The LP5912 offers class-leading noise performance without a noise bypass capacitor and with the ability for remote output capacitance placement.

The device is designed to work with a 1-µF input and a 1-µF output ceramic capacitor (no separate noise bypass capacitor required).

This device is available with fixed output voltages from 0.8 V to 5.5 V in 25-mV steps. Contact Texas Instruments Sales for specific voltage option needs.

The LP5912 is low-noise LDO that can supply up to 500 mA of output current. Designed to meet the requirements of RF and analog circuits, the LP5912 device provides low noise, high PSRR, low quiescent current, and low line and load transient response. The LP5912 offers class-leading noise performance without a noise bypass capacitor and with the ability for remote output capacitance placement.

The device is designed to work with a 1-µF input and a 1-µF output ceramic capacitor (no separate noise bypass capacitor required).

This device is available with fixed output voltages from 0.8 V to 5.5 V in 25-mV steps. Contact Texas Instruments Sales for specific voltage option needs.

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類型 標題 日期
* Data sheet LP5912 500-mA Low-Noise, Low-IQ LDO datasheet (Rev. D) PDF | HTML 2016年 11月 29日
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 2018年 3月 21日
EVM User's guide LP5912DRV EVM User's Guide 2015年 12月 15日

設計與開發

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開發板

LP5912DRV33EVM — LP5912 3.3V 500mA 低雜訊低 IQ LDO 線性穩壓器評估模組

LP5912EVM 透過使用者可存取的啟用 (EN) 和電源良好 (PG) 測試點,幫助進行 LP5912-3.3DRVR 低雜訊、500mA 線性穩壓器評估。EVM 是一款獨立評估模組,內含正電壓低壓降穩壓器 IC 以提供固定電壓調節 (3.3V)。EVM 展示了採用 6 接腳 WSON/DRV 封裝的 3.3V、500mA 超低雜訊低壓降線性穩壓器運作情形。

使用指南: PDF
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模擬型號

LP5912 0P9 PSpice Transient Model

SNVMAJ1.ZIP (62 KB) - PSpice Model
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LP5912 0P9 Unencrypted PSpice Transient Model

SNVMAJ0.ZIP (3 KB) - PSpice Model
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LP5912 1P0 PSpice Transient Model

SNVMBO0.ZIP (65 KB) - PSpice Model
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LP5912 1P0 Unencrypted PSpice Transient Model

SNVMBO3.ZIP (3 KB) - PSpice Model
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LP5912 1P1 PSpice Transient Model

SNVMB44.ZIP (63 KB) - PSpice Model
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LP5912 1P1 Unencrypted PSpice Transient Model

SNVMB43.ZIP (3 KB) - PSpice Model
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LP5912 1P2 PSpice Transient Model

SNVMB47.ZIP (63 KB) - PSpice Model
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LP5912 1P2 Unencrypted PSpice Transient Model

SNVMB46.ZIP (3 KB) - PSpice Model
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LP5912 1P5 PSpice Transient Model

SNVMAI7.ZIP (62 KB) - PSpice Model
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LP5912 1P5 Unencrypted PSpice Transient Model

SNVMAI8.ZIP (3 KB) - PSpice Model
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LP5912 1P8 Unencrypted PSpice Transient Model

SNVMAJ4.ZIP (3 KB) - PSpice Model
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LP5912 1P8_PSpice Transient Model

SNVMAI3.ZIP (61 KB) - PSpice Model
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LP5912 2P5 PSpice Transient Model

SNVMBO5.ZIP (61 KB) - PSpice Model
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LP5912 2P5 Unencrypted PSpice Transient Model

SNVMBO4.ZIP (3 KB) - PSpice Model
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LP5912 2P8 PSpice Transient Model

SNVMAI9.ZIP (62 KB) - PSpice Model
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LP5912 2P8_Unencrypted PSpice Transient Model

SNVMAI2.ZIP (3 KB) - PSpice Model
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LP5912 3P0 PSpice Transient Model

SNVMB42.ZIP (63 KB) - PSpice Model
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LP5912 3P0 Unencrypted PSpice Transient Model

SNVMB45.ZIP (3 KB) - PSpice Model
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LP5912 3P3 PSpice Transient Model

SNVMAJ3.ZIP (59 KB) - PSpice Model
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LP5912 3P3 Unencrypted PSpice Transient Model

SNVMAJ2.ZIP (3 KB) - PSpice Model
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LP5912 5P0 PSpice Transient Model

SNVMBO1.ZIP (61 KB) - PSpice Model
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LP5912 5P0 Unencrypted PSpice Transient Model

SNVMBO2.ZIP (3 KB) - PSpice Model
參考設計

TIDA-00897 — 適用於 WLAN 應用的高準確度對數 RMS 功率偵測器參考設計

Dynamic transmit-power control is critical for improving spectral efficiency and reducing adjacent channel interference in wireless local area networks (WLANs). In addition, regulatory agencies worldwide require that transmit power be limited to a certain level to reduce interference with other (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
WSON (DRV) 6 Ultra Librarian

訂購與品質

內含資訊:
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  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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