封裝資訊
| 封裝 | 針腳 VQFN-HR (RNF) | 26 |
| 操作溫度範圍 (°C) -40 to 125 |
| 包裝數量 | 運送業者 250 | SMALL T&R |
LP875761-Q1 的特色
- Qualified for Automotive Applications
- AEC-Q100 Qualified With the
Following Results:
- Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature
- Device HBM ESD Classification Level 2
- Device CDM ESD Classification Level C4B
- Input Voltage: 2.8 V to 5.5 V
- Output Voltage: 1.0 V
- Four High-Efficiency Step-Down
DC/DC Converter Cores:
- Maximum Output Current: 16 A (4 A per Phase)
- Switching Frequency: 3 MHz
- Spread-Spectrum Mode and Phase Interleaving
- Configurable General Purpose I/O (GPIOs)
- I2C-Compatible Interface That Supports Standard (100 kHz), Fast (400 kHz), Fast+ (1 MHz), and High-Speed (3.4 MHz) Modes
- Interrupt Function With Programmable Masking
- Programmable Power-Good Signal (PGOOD)
- Output Short-Circuit and Overload Protection
- Overtemperature Warning and Protection
- Overvoltage Protection (OVP) and Undervoltage Lockout (UVLO)
LP875761-Q1 的說明
The LP875761-Q1 device is designed to meet the power-management requirements of the latest processors and platforms in various automotive power applications. The device contains four step-down DC/DC converter cores, which are configured as a 4-phase output in forced-PWM mode. The device is controlled by an I2C-compatible serial interface and by enable signals.
The LP875761-Q1 supports remote differential-voltage sensing for multiphase outputs to compensate IR drop between the regulator output and the point-of-load (POL) which improves the accuracy of the output voltage. The switching clock can be forced to PWM mode and also synchronized to an external clock to minimize the disturbances.
The LP875761-Q1 device supports load-current measurement without the addition of external current-sense resistors. The LP875761-Q1 device also supports programmable start-up and shutdown delays and sequences synchronized to enable signals. The sequences can also include GPIO signals to control external regulators, load switches, and processor reset. During start-up, the device controls the output slew rate to minimize output-voltage overshoot and in-rush current.