產品規格表
MAX3232-EP
- RS-232 Bus-Pin ESD Protection Exceeds
±15 kV Using Human-Body Model (HBM) - Meets or Exceeds the Requirements of TIA/EIA-232-F and ITU v.28 Standards
- Operates With 3-V to 5.5-V VCC Supply
- Operates Up To 250 kbit/s
- Two Drivers and Two Receivers
- Low Supply Current . . . 300 µA Typical
- External Capacitors . . . 4 × 0.1 µF
- Accepts 5-V Logic Input With 3.3-V Supply
- Alternative High-Speed Pin-Compatible Device (1 Mbit/s)
- SNx5C3232
- SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
- Controlled Baseline
- One Assembly/Test Site
- One Fabrication Site
- Available in Military (–55°C/125°C) Temperature Range(1)
- Extended Product Life Cycle
- Extended Product-Change Notification
- Product Traceability
- APPLICATIONS
- Battery-Powered Systems, PDAs, Notebooks, Laptops,
Palmtop PCs, and Hand-Held Equipment
- Battery-Powered Systems, PDAs, Notebooks, Laptops,
(1) Additional temperature ranges are available - contact factory
The MAX3232 device consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices operate at data signaling rates up to 250 kbit/s and a maximum of 30-V/µs driver output slew rate.
技術文件
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檢視所有 4 類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | 3-V to 5.5-V Multichannel RS-232 Line Driver/Receiver w/+/-15-kV ESD datasheet (Rev. A) | 2009年 3月 23日 | |
* | VID | MAX3232-EP VID V6206623 | 2016年 6月 21日 | |
* | Radiation & reliability report | MAX3232MDBREP Reliability Report | 2016年 1月 13日 | |
* | Radiation & reliability report | MAX3232MPWREP Reliability Report | 2016年 1月 13日 |
設計與開發
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模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SSOP (DB) | 16 | Ultra Librarian |
TSSOP (PW) | 16 | Ultra Librarian |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點
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