MAX3232E

現行

具 +/-15-kV IEC-ESD 保護的 3 至 5.5-V 雙通道 250kbps RS-232 線路驅動器/接收器

產品詳細資料

Drivers per package 2 Receivers per package 2 Logic voltage (min) (V) 3.3 Data rate (max) (Mbps) 0.25 Main supply voltage (nom) (V) 3.3, 5 ESD HBM (kV) 15 Rating Catalog Operating temperature range (°C) -40 to 85 Vout (typ) (V) 5.4
Drivers per package 2 Receivers per package 2 Logic voltage (min) (V) 3.3 Data rate (max) (Mbps) 0.25 Main supply voltage (nom) (V) 3.3, 5 ESD HBM (kV) 15 Rating Catalog Operating temperature range (°C) -40 to 85 Vout (typ) (V) 5.4
SOIC (D) 16 59.4 mm² 9.9 x 6 SOIC (DW) 16 106.09 mm² 10.3 x 10.3 SSOP (DB) 16 48.36 mm² 6.2 x 7.8 TSSOP (PW) 16 32 mm² 5 x 6.4
  • ESD protection for RS-232 bus pins
    • ±15 kV (HBM)
    • ±8 kV (IEC61000-4-2, Contact discharge)
    • ±15 kV (IEC61000-4-2, Air-gap discharge)
  • Meets or exceeds the requirements of TIA/EIA-232-F and ITU V.28 standards
  • Operates with 3-V to 5.5-V VCC supply
  • Operates up to 250 kbit/s
  • Two drivers and two receivers
  • Low supply current: 300 µA (typical)
  • External capacitors: 4 × 0.1 µF
  • Accepts 5-V logic input with 3.3-V supply
  • Pin compatible to alternative high-speed devices (1 Mbit/s)
    • SN65C3232E (–40°C to +85°C)
    • SN75C3232E (0°C to 70°C)
  • ESD protection for RS-232 bus pins
    • ±15 kV (HBM)
    • ±8 kV (IEC61000-4-2, Contact discharge)
    • ±15 kV (IEC61000-4-2, Air-gap discharge)
  • Meets or exceeds the requirements of TIA/EIA-232-F and ITU V.28 standards
  • Operates with 3-V to 5.5-V VCC supply
  • Operates up to 250 kbit/s
  • Two drivers and two receivers
  • Low supply current: 300 µA (typical)
  • External capacitors: 4 × 0.1 µF
  • Accepts 5-V logic input with 3.3-V supply
  • Pin compatible to alternative high-speed devices (1 Mbit/s)
    • SN65C3232E (–40°C to +85°C)
    • SN75C3232E (0°C to 70°C)

The MAX3232E device consists of two line drivers, two-line receivers, and a dual charge-pump circuit with ±15-kV IEC ESD protection pin to pin (serial-port connection pins, including GND).

The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices operate at data signaling rates up to 250 kbit/s and a maximum of 30-V/µs driver output slew rate.

The MAX3232E device consists of two line drivers, two-line receivers, and a dual charge-pump circuit with ±15-kV IEC ESD protection pin to pin (serial-port connection pins, including GND).

The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices operate at data signaling rates up to 250 kbit/s and a maximum of 30-V/µs driver output slew rate.

下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
可直接投入的替代產品,相較於所比較的裝置,具備升級功能
TRS3232E 現行 具 +/-15-kV IEC-ESD 保護的 3 至 5.5-V 雙通道 250kbps RS-232 線路驅動器/接收器 Optimized for a smaller footprint in a 3mm x 3mm QFN package
TRSF3232E 現行 具 +/-15-kV IEC-ESD 保護的 3 至 5.5-V 多通道 1Mbps RS-232 線路驅動器/接收器 Pin-to-pin upgrade with higher 1-Mbps data rate

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 1
類型 標題 日期
* Data sheet MAX3232E 3-V to 5.5-V Multichannel RS-232 Line Driver and Receiver With ±15-kV IEC ESD Protection datasheet (Rev. E) PDF | HTML 2021年 6月 22日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

IBIS Model of MAX3232E

SLLM062.ZIP (48 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 16 Ultra Librarian
SOIC (DW) 16 Ultra Librarian
SSOP (DB) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片