SCAN90004
- 1.5 Gbps Maximum Data Rate Per Channel
- Configurable Pre-emphasis Drives Lossy Backplanes and Cables
- Low Output Skew and Jitter
- LVDS/CML/LVPECL Compatible Input, LVDS Output
- On-chip 100Ω Input and Output Termination
- 12 kV ESD Protection on LVDS Outputs
- IEEE 1149.1 JTAG Interface
- IEEE 1149.6 Limited Capability
- Fault Insertion
- Single 3.3V Supply
- Very Low Power Consumption
- Industrial -40 to +85°C Temperature Range
- Small TQFP Package Footprint
- See DS90LV004 for Non-JTAG Version
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The SCAN90004 is a four channel 1.5 Gbps LVDS buffer/repeater. High speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while configurable pre-emphasis overcomes ISI jitter effects from lossy backplanes and cables. The differential inputs interface to LVDS, and Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The differential inputs and outputs are internally terminated with a 100Ω resistor to improve performance and minimize board space. The repeater function is especially useful for boosting signals for longer distance transmission over lossy cables and backplanes.
Integrated testability circuitry supports IEEE1149.1 (JTAG) on single-ended LVTTL/CMOS I/O and limited IEEE1149.6 capability on high-speed differential LVDS interconnects. The 3.3V supply, CMOS process, and LVDS I/O ensure stable high performance at low power over the entire industrial -40 to +85°C temperature range.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | SCAN90004 4-Channel LVDS Buffer/Repeater with Pre-Emphasis datasheet (Rev. P) | 2013年 4月 12日 | |
Application note | Signaling Rate vs. Distance for Differential Buffers | 2010年 1月 26日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
TQFP (PFB) | 48 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點