SN65C1168E-SEP
- VID V62/19606
- Radiation hardened
- Single event latch-up (SEL) immune to 43 MeV-cm2/mg at 125°C
- ELDRS-free to 30 krad(Si)
- Total ionizing dose (TID) RLAT for every wafer lot up to 20 krad(Si)
- Space Enhanced Plastic
- Controlled baseline
- Gold wire
- NiPdAu lead finish
- One assembly and test site
- One fabrication site
- Available in military (–55°C to 125°C) temperature range
- Extended product life cycle
- Extended product-change notification
- Product traceability
- Enhanced mold compound for low outgassing
- Meet or exceed standards TIA/EIA-422-B and ITU recommendation V.11
- Operate from single 5-V power supply
- ESD protection for RS-422 bus pins
- ±12-kV human-body model (HBM)
- ±8-kV IEC 61000-4-2, contact discharge
- ±8-kV IEC 61000-4-2, air-gap discharge
- Low-pulse skew
- Receiver input impedance . . . 17 kΩ (typical)
- Receiver input sensitivity . . . ±200 mV
- Receiver common-mode input voltage range of
–7 V to 7 V - Glitch-free power-up/power-down protection
The SN65C1168E-SEP consists of dual drivers and dual receivers with ±12-kV ESD (HBM) and ±8-kV ESD (IEC61000-4-2 Air-Gap Discharge and Contact Discharge) for RS-422 bus pins. The device meets the requirements of TIA/EIA-422-B and ITU recommendation V.11. Some parameters do not meet all TIA/EIA-422-B and ITU recommendation V.11 requirements after 20-krad(Si) TID exposure.
The SN65C1168E-SEP drivers have individual active-high enables.
技術文件
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檢視所有 9 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | SN65C1168E-SEP Dual Differential Drivers and Receivers With ±12-kV ESD Protection datasheet | PDF | HTML | 2019年 7月 23日 |
| * | Radiation & reliability report | SN65C1168E-SEP Single-Event Latch-Up (SEL) Radiation Report | 2020年 10月 30日 | |
| * | VID | SN65C1168E-SEP VID V6219606 | 2020年 8月 6日 | |
| * | Radiation & reliability report | SN65C1168E-SEP Reliability Report | 2019年 6月 24日 | |
| * | Radiation & reliability report | SN65C1168E-SEP Total Ionizing Dose (TID) Radiation Report | 2019年 4月 2日 | |
| Selection guide | TI Space Products (Rev. J) | 2024年 2月 12日 | ||
| Technical article | 航太級強化產品如何因應低地球軌道應用的挑戰 (Rev. A) | PDF | HTML | 2024年 1月 11日 | |
| Application note | Reduce the Risk in Low-Earth Orbit Missions with Space Enhanced Plastic Products (Rev. A) | PDF | HTML | 2022年 9月 15日 | |
| Application brief | Space-Grade, 30-krad, Isolated RS-422 Serial Transceiver Circuit | PDF | HTML | 2021年 6月 1日 |
設計與開發
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開發板
14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組
14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (PW) | 16 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。