SN65ELT21

現行

5V PECL 到 TTL 轉換器

產品詳細資料

Function Receiver, Translator Protocols PECL Number of transmitters 0 Number of receivers 1 Supply voltage (V) 5 Signaling rate (Mbps) 400 Input signal PECL Output signal TTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver, Translator Protocols PECL Number of transmitters 0 Number of receivers 1 Supply voltage (V) 5 Signaling rate (Mbps) 400 Input signal PECL Output signal TTL Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • 3ns (TYP) Propagation Delay
  • Operating Range: VCC = 4.2 V to 5.7 V with GND = 0 V
  • 24-mA TTL Output
  • Deterministic Output Value for Open Input Conditions or When Inputs < 1.3 V
  • Built-In Temperature Compensation
  • Drop-In Compatible to the MC10ELT21, MC100ELT21
  • APPLICATIONS
    • Data and Clock Transmission Over Backplane
    • Signaling Level Conversion for Clock or Data

  • 3ns (TYP) Propagation Delay
  • Operating Range: VCC = 4.2 V to 5.7 V with GND = 0 V
  • 24-mA TTL Output
  • Deterministic Output Value for Open Input Conditions or When Inputs < 1.3 V
  • Built-In Temperature Compensation
  • Drop-In Compatible to the MC10ELT21, MC100ELT21
  • APPLICATIONS
    • Data and Clock Transmission Over Backplane
    • Signaling Level Conversion for Clock or Data

The SN65ELT21 is a differential PECL-to-TTL translator. It operates on +5-V supply and ground only. The device includes circuitry to maintain Q to a low logic level when inputs are in an open condition or < 1.3 V.

The VBB pin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01µF decoupling capacitor between VCC and VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBB open when it is not used.

The SN65ELT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.

The SN65ELT21 is a differential PECL-to-TTL translator. It operates on +5-V supply and ground only. The device includes circuitry to maintain Q to a low logic level when inputs are in an open condition or < 1.3 V.

The VBB pin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01µF decoupling capacitor between VCC and VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBB open when it is not used.

The SN65ELT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.

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類型 標題 日期
* Data sheet 5-V PECL-to-TTL Translator datasheet 2009年 6月 26日
Application note AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C) 2007年 10月 17日

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