SN65HVD1792-EP
- Bus-Pin Fault Protection to > ±70 V
- Common-Mode Voltage Range (–20 V to 25 V)
More Than Doubles TIA/EIA 485 Requirement - Bus I/O Protection
- ±16 kV JEDEC HBM Protection
- Reduced Unit Load for Up to 256 Nodes
- Failsafe Receiver for Open-Circuit, Short-Circuit
and Idle-Bus Conditions - Low Power Consumption
- Low Standby Supply Current, 1 µA Typ
- ICC 5 mA Quiescent During Operation
- Power-Up, Power-Down Glitch-Free Operation
The SN65HVD1792 is designed to survive overvoltage faults such as direct shorts to power supplies, mis-wiring faults, connector failures, cable crushes, and tool mis-applications. It is also robust to ESD events, with high levels of protection to human-body model specifications.
The SN65HVD1792 combines a differential driver and a differential receiver, which operate from a single power supply. The SN65HVD1792 is characterized from –40°C to 105°C.
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檢視所有 2 類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | Fault-Protected RS-485 Transceiver With Extended Common-Mode Range datasheet (Rev. A) | 2013年 8月 20日 | |
* | VID | SN65HVD1792-EP VID V6213620 | 2016年 6月 21日 |
設計與開發
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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (D) | 14 | Ultra Librarian |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
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建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。