SN65LBC175A
- Designed for TIA/EIA-485, TIA/EIA-422, and ISO 8482 applications
- Signaling rate exceeding 50 Mbps
- Fail-safe in bus short-circuit, open-circuit, and idle-bus conditions
- ESD protection on bus inputs 6 kV
- Common-mode bus input range −7 V to 12 V
- Propagation delay times <16 ns
- Low standby power consumption <20 µA
- Pin-compatible upgrade for MC3486, DS96F175, LTC489, and SN75175
The SN65LBC175A and SN75LBC175A are quadruple differential line receivers with 3-state outputs, designed for TIA/EIA-485 (RS-485), TIA/EIA-422 (RS-422), and ISO 8482 (Euro RS-485) applications.
These devices are optimized for balanced multipoint bus communication at data rates up to and exceeding 50 million bits per second. The transmission media may be twisted-pair cables, printed-circuit board traces, or backplanes. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.
Each receiver operates over a wide range of positive and negative common-mode input voltages, and features ESD protection to 6 kV, making it suitable for high-speed multipoint data transmission applications in harsh environments. These devices are designed using LinBiCMOS™, facilitating low power consumption and inherent robustness.
Two EN inputs provide pair-wise enable control, or these can be tied together externally to enable all four drivers with the same signal.
The SN75LBC175A is characterized for operation over the temperature range of 0°C to 70°C. The SN65LBC175A is characterized over the temperature range from −40°C to 85°C.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | SN65LBC175A, SN75LBC175A Quadruple RS-485 Differential Line Receivers datasheet (Rev. D) | PDF | HTML | 2023年 11月 8日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
PDIP (N) | 16 | Ultra Librarian |
SOIC (D) | 16 | Ultra Librarian |
訂購與品質
- RoHS
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- 產品標記
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- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
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