SN65LBC175A-EP

現行

四路 RS-485 差分線路接收器

產品詳細資料

Number of receivers 4 Number of transmitters 0 Supply voltage (nom) (V) 5 Signaling rate (max) (Mbps) 50 Fault protection (V) -10 to 15 Common-mode range (V) -7 to 12 Number of nodes 32 Isolated No Supply current (max) (µA) 32000 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Number of receivers 4 Number of transmitters 0 Supply voltage (nom) (V) 5 Signaling rate (max) (Mbps) 50 Fault protection (V) -10 to 15 Common-mode range (V) -7 to 12 Number of nodes 32 Isolated No Supply current (max) (µA) 32000 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
SOIC (D) 16 59.4 mm² 9.9 x 6
  • Designed for TIA/EIA-485, TIA/EIA-422 and ISO 8482 Applications
  • Signaling Rates(1) Exceeding 50 Mbps
  • Fail-Safe in Bus Short-Circuit, Open-Circuit, and Idle-Bus Conditions
  • ESD Protection on Bus Inputs Exceeds 6 kV
  • Common-Mode Bus Input Range –7 V to 12 V
  • Propagation Delay Times < 18 ns
  • Low Standby Power Consumption < 32 µA
  • Pin-Compatible Upgrade for MC3486, DS96F175, LTC489, and SN75175
  • Designed for TIA/EIA-485, TIA/EIA-422 and ISO 8482 Applications
  • Signaling Rates(1) Exceeding 50 Mbps
  • Fail-Safe in Bus Short-Circuit, Open-Circuit, and Idle-Bus Conditions
  • ESD Protection on Bus Inputs Exceeds 6 kV
  • Common-Mode Bus Input Range –7 V to 12 V
  • Propagation Delay Times < 18 ns
  • Low Standby Power Consumption < 32 µA
  • Pin-Compatible Upgrade for MC3486, DS96F175, LTC489, and SN75175

The SN65LBC175A-EP is a quadruple differential line receiver with 3-state outputs, designed for TIA/EIA-485 (RS-485), TIA/EIA-422 (RS-422), and ISO 8482 (Euro RS-485) applications.

This device is optimized for balanced multipoint bus communication at data rates up to and exceeding 50 million bits per second. The transmission media may be twisted-pair cables, printed-circuit board traces, or backplanes. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The receiver operates over a wide range of positive and negative common-mode input voltages, and features ESD protection to 6 kV, making it suitable for high-speed multipoint data transmission applications in harsh environments. These devices are designed using LinBiCMOS®, facilitating low power consumption and robustness.

Two EN inputs provide pair-wise enable control, or these can be tied together externally to enable all four drivers with the same signal.

The SN65LBC175A-EP is a quadruple differential line receiver with 3-state outputs, designed for TIA/EIA-485 (RS-485), TIA/EIA-422 (RS-422), and ISO 8482 (Euro RS-485) applications.

This device is optimized for balanced multipoint bus communication at data rates up to and exceeding 50 million bits per second. The transmission media may be twisted-pair cables, printed-circuit board traces, or backplanes. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The receiver operates over a wide range of positive and negative common-mode input voltages, and features ESD protection to 6 kV, making it suitable for high-speed multipoint data transmission applications in harsh environments. These devices are designed using LinBiCMOS®, facilitating low power consumption and robustness.

Two EN inputs provide pair-wise enable control, or these can be tied together externally to enable all four drivers with the same signal.

下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
功能與所比較的裝置相似
SN75175 現行 四路差分線路接收器 Catalog version

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 3
類型 標題 日期
* Data sheet SN65LBC175A-EP Quadruple RS-485 Differential Line Receiver datasheet PDF | HTML 2016年 12月 20日
* VID SN65LBC175A-EP VID V6217603 2018年 3月 27日
* Radiation & reliability report SN65LBC175AMDREP Reliability Report 2018年 3月 5日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

SN65LBC175A, SN75LBC175A IBIS Model D PKG

SLLC058.ZIP (5 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 16 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片