SN65LBC184
- Integrated transient voltage suppression
- ESD Protection for bus terminals exceeds: ±30kV IEC 61000-4-2, contact discharge ±30kV IEC 61000-4-2, Air-gap discharge ±15kV EIA/JEDEC Human body model
- Circuit damage protection of 400W peak (typical) per IEC 61000-4-5
- Controlled driver output-voltage slew rates allow longer cable stub lengths
- 250kbps in Electrically noisy environments
- Open-circuit fail-safe receiver design
- 1/4 Unit load allows for 128 devices connected on bus
- Thermal shutdown protection
- Power-up and power-down glitch protection
- Each transceiver meets or exceeds the requirements of TIA/EIA-485 (RS-485) and ISO/IEC 8482:1993(E) standards
- Low disabled supply current 300µA maximum
- Pin compatible with SN75176
The SN75LBC184 and SN65LBC184 devices are differential data line transceivers in the trade-standard footprint of the SN75176 with built-in protection against high-energy noise transients. This feature provides a substantial increase in reliability for better immunity to noise transients coupled to the data cable over most existing devices. Use of these circuits provides a reliable low-cost direct-coupled (with no isolation transformer) data line interface without requiring any external components.
The SN75LBC184 and SN65LBC184 can withstand overvoltage transients of 400W peak (typical). The conventional combination wave called out in IEC 61000-4-5 simulates the overvoltage transient and models a unidirectional surge caused by overvoltages from switching and secondary lightning transients.
您可能會感興趣的類似產品
引腳對引腳且具備與所比較裝置相同的功能
技術文件
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
PDIP (P) | 8 | Ultra Librarian |
SOIC (D) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。