SN65LVDS122
- Designed for Signaling Rates(1) Up To 1.5 Gbps
- Total Jitter < 65 ps
- Pin-Compatible With SN65LVDS22 and SN65LVDM22
- 25 mV of Receiver Input Threshold Hysteresis Over 0-V to 4-V Common-Mode Range
- Inputs Electrically Compatible With CML, LVPECL and LVDS Signal Levels
- Propagation Delay Times, 900 ps Maximum
- LVDT Integrates 110-
Terminating Resistor - Offered in SOIC and TSSOP
- APPLICATIONS
- 10-G (OC–192) Optical Modules
- 622 MHz Central Office Clock Distribution
- Wireless Basestations
- Low Jitter Clock Repeater/Multiplexer
- Protection Switching for Serial Backplanes
(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
The SN65LVDS122 and SN65LVDT122 are crosspoint switches that use low voltage differential signaling (LVDS) to achieve signaling rates as high as 1.5 Gbps. They are pin-compatible speed upgrades to the SN65LVDS22 and SN65LVDM22. The internal signal paths maintain differential signaling for high speeds and low signal skews. These devices have a 0 V to 4 V common-mode input range that accepts LVDS, LVPECL, CML inputs. Two logic pins (S0 and S1) set the internal configuration between the differential inputs and outputs. This allows the flexibility to perform the following configurations: 2 x 2 crosspoint switch, 2:1 mux, 1:2 splitter or dual repeater/translator within a single device. Additionally, SN65LVDT122 incorporates a 110- termination resistor for those applications where board space is a premium. Although these devices are designed for 1.5 Gbps, some applications at a 2-Gbps data rate can be supported depending on loading and signal quality.
The intended application of this device is ideal for loopback switching for diagnostic routines, fanout buffering of clock/data distribution provide protection in fault-tolerant systems, clock muxing in optical modules, and for overall signal boosting over extended distances.
The SN65LVDS122 and SN65LVDT122 are characterized for operation from –40°C to 85°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | SN65LVDS122, SN65LVDT122 - 1.5 Gbps 2 x 2 LVDS Crosspoint Switch datasheet (Rev. B) | 2004年 6月 2日 | |
| EVM User's guide | SN65LVDS122EVM User's Guide (Rev. A) | 2003年 3月 11日 |
設計與開發
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SN65LVDS125AEVM — SN65LVDS125 評估模組
The SN65LVDS125A is a 4 x 4 non-blocking cross point switch. Low-Voltage differential signaling (LVDS) is used to achieve signaling rates of 1.5 Gbps per channel. Each output driver includes a 4:1 multiplexer to allow any input to be routed to any output.Internal signal paths are fully differential (...)
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |
| TSSOP (PW) | 16 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。