SN65LVDS180
- Meets or Exceeds the Requirements of ANSI
TIA/EIA-644-1995 Standard - Full-Duplex Signaling Rates up to 150 Mbps
- Bus-Pin ESD Exceeds 12 kV
- Operates From a Single 3.3-V Supply
- Low-Voltage Differential Signaling With Typical
Output Voltages of 350 mV and a 100-Ω Load - Propagation Delay Times
- Driver: 1.7 ns Typical
- Receiver: 3.7 ns Typical
- Power Dissipation at 200 MHz
- Driver: 25 mW Typical
- Receiver: 60 mW Typical
- LVTTL Input Levels Are 5-V Tolerant
- Receiver Maintains High Input Impedance With
VCC < 1.5 V - Receiver Has Open-Circuit Fail Safe
The SN65LVDS179, SN65LVDS180, SN65LVDS050, and SN65LVDS051 devices are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The TIA/EIA-644 standard-compliant electrical interface provides a minimum differential output voltage magnitude of 247 mV into a 100-Ω load and receipt of 100-mV signals with up to 1 V of ground potential difference between a transmitter and receiver.
These devices offer various driver, receiver, and enabling combinations in industry-standard footprints. Because these devices are intended for use in simplex or distributed simplex bus structures, the driver enable function does not put the differential outputs into a high-impedance state but rather disconnects the input and reduces the quiescent power used by the device. For these functions with a high-impedance driver output, see the SN65LVDM series of devices. All devices are characterized for operation from –40°C to 85°C.
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技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | SN65LVDSxxx High-Speed Differential Line Drivers and Receivers datasheet (Rev. R) | PDF | HTML | 2016年 1月 22日 |
| Application brief | LVDS to Improve EMC in Motor Drives | 2018年 9月 27日 | ||
| Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 2018年 8月 3日 | ||
| Application brief | How to Terminate LVDS Connections with DC and AC Coupling | 2018年 5月 16日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 14 | Ultra Librarian |
| TSSOP (PW) | 14 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
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