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LVDS、M-LVDS 和 PECL IC

SN65LVDS22

現行

雙路多工 LVDS 中繼器

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產品規格表

SN65LVDS22

現行
產品規格表 立即訂購

產品詳細資料

Function Repeater Protocols LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Repeater Protocols LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard
  • Designed for Clock Rates up to 200 MHz (400 Mbps)
  • Designed for Data Rates up to 250 Mbps
  • Pin Compatible With SN65LVDS122 and SN65LVDT122, 1.5 Gbps 2x2 Crosspoint Switch From TI
  • ESD Protection Exceeds 12 kV on Bus Pins
  • Operates From a Single 3.3-V Supply
  • Low-Voltage Differential Signaling With Output Voltages of 350 mV Into:
    • 100- Load (SN65LVDS22)
    • 50- Load (SN65LVDM22)
  • Propagation Delay Time; 4 ns Typ
  • Power Dissipation at 400 Mbps of 150 mW
  • Bus Pins Are High Impedance When Disabled or With VCC Less Than 1.5 V
  • LVTTL Levels Are 5 V Tolerant
  • Open-Circuit Fail Safe Receiver
  • Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard
  • Designed for Clock Rates up to 200 MHz (400 Mbps)
  • Designed for Data Rates up to 250 Mbps
  • Pin Compatible With SN65LVDS122 and SN65LVDT122, 1.5 Gbps 2x2 Crosspoint Switch From TI
  • ESD Protection Exceeds 12 kV on Bus Pins
  • Operates From a Single 3.3-V Supply
  • Low-Voltage Differential Signaling With Output Voltages of 350 mV Into:
    • 100- Load (SN65LVDS22)
    • 50- Load (SN65LVDM22)
  • Propagation Delay Time; 4 ns Typ
  • Power Dissipation at 400 Mbps of 150 mW
  • Bus Pins Are High Impedance When Disabled or With VCC Less Than 1.5 V
  • LVTTL Levels Are 5 V Tolerant
  • Open-Circuit Fail Safe Receiver

The SN65LVDS22 and SN65LVDM22 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The receiver outputs can be switched to either or both drivers through the multiplexer control signals S0 and S1. This allows the flexibility to perform splitter or signal routing functions with a single device.

The TIA/EIA-644 standard compliant electrical interface provides a minimum differential output voltage magnitude of 247 mV into a 100- load.

The intended application of these devices and signaling technique is for both point-to-point baseband (single termination) and multipoint (double termination) data transmissions over controlled impedance media. The transmission media may be printed-circuit board traces, backplanes, or cables. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other application specific characteristics).

The SN65LVDS22 and SN65LVDM22 are characterized for operation from –40°C to 85°C.

The SN65LVDS22 and SN65LVDM22 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The receiver outputs can be switched to either or both drivers through the multiplexer control signals S0 and S1. This allows the flexibility to perform splitter or signal routing functions with a single device.

The TIA/EIA-644 standard compliant electrical interface provides a minimum differential output voltage magnitude of 247 mV into a 100- load.

The intended application of these devices and signaling technique is for both point-to-point baseband (single termination) and multipoint (double termination) data transmissions over controlled impedance media. The transmission media may be printed-circuit board traces, backplanes, or cables. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other application specific characteristics).

The SN65LVDS22 and SN65LVDM22 are characterized for operation from –40°C to 85°C.
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類型 標題 日期
* Data sheet Dual Multiplexed LVDS Repeaters datasheet (Rev. C) 2002年 5月 9日

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模擬型號

SN65LVDS22 IBIS Model (Rev. A)

SLLM007A.ZIP (9 KB) - IBIS Model
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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
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