SN65LVDS31

現行

400-Mbps LVDS 四路高速差分驅動器

產品詳細資料

Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal CMOS, LVTTL, TTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal CMOS, LVTTL, TTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Meet or Exceed the Requirements of ANSI TIA/EIA-644 Standard
  • Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and 100-Ω Load
  • Typical Output Voltage Rise and Fall Times of 500 ps (400 Mbps)
  • Typical Propagation Delay Times of 1.7 ns
  • Operate From a Single 3.3-V Supply
  • Power Dissipation 25 mW Typical Per Driver at 200 MHz
  • Driver at High-Impedance When Disabled or With VCC = 0
  • Bus-Terminal ESD Protection Exceeds 8 kV
  • Low-Voltage TTL (LVTTL) Logic Input Levels
  • Pin Compatible With AM26LS31, MC3487, and µA9638
  • Cold Sparing for Space and High-Reliability Applications Requiring Redundancy
  • Meet or Exceed the Requirements of ANSI TIA/EIA-644 Standard
  • Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and 100-Ω Load
  • Typical Output Voltage Rise and Fall Times of 500 ps (400 Mbps)
  • Typical Propagation Delay Times of 1.7 ns
  • Operate From a Single 3.3-V Supply
  • Power Dissipation 25 mW Typical Per Driver at 200 MHz
  • Driver at High-Impedance When Disabled or With VCC = 0
  • Bus-Terminal ESD Protection Exceeds 8 kV
  • Low-Voltage TTL (LVTTL) Logic Input Levels
  • Pin Compatible With AM26LS31, MC3487, and µA9638
  • Cold Sparing for Space and High-Reliability Applications Requiring Redundancy

The SN55LVDS31, SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 devices are differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 247 mV into a 100-Ω load when enabled.

The SN55LVDS31, SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 devices are differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 247 mV into a 100-Ω load when enabled.

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類型 標題 日期
* Data sheet SNx5LVDSxx High-Speed Differential Line Drivers datasheet (Rev. N) PDF | HTML 2021年 1月 21日
Application brief How to Support 1.8-V Signals Using a 3.3-V LVDS Driver/Receiver + Level-Shifter 2018年 12月 28日
Application brief LVDS to Improve EMC in Motor Drives 2018年 9月 27日
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018年 8月 3日
Application note LVDS Multidrop Connections (Rev. A) 2002年 2月 11日
Application note Performance of LVDS with Different Cables (Rev. B) 2002年 2月 11日
Application note An Overview of LVDS Technology 1998年 10月 5日

設計與開發

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開發板

SN65LVDS31-32BEVM — 適用 LVDS31 和 LVDS32B 的 SN65LVDS31-32B 低電壓差動訊號評估模組

TI offers a series of low-voltage differential signaling (LVDS) evaluation modules (EVMs) designed for analysis of the electrical characteristics of LVDS drivers and receivers. Four unique EVMs are available to evaluate the different classes of LVDS devices offered by TI.

Combination Table

As seen (...)

使用指南: PDF
TI.com 無法提供
開發板

SN65LVDS31-32EVM — 適用 SNx5LVDS31 和 SNx5LVDS32 的 SN65LVDS31-32EVM 評估模組

The SN65LVDS31-32EVM evaluation moduel (EVM) includes the SV65LVDS31 quad driver and the SN65LVDS32 quad receiver. The SN65LVDS31 device is a TIA/EIA-644 standard-compliant LVDS driver. The SN65LVDS32 device is a TIA/EIA-644 standard-compliant receiver that has a passive open-circuit failsafe (...)

使用指南: PDF
TI.com 無法提供
開發板

SN65LVDS31-33EVM — 適用 SN65LVDS31 和 SN65LVDS33 的評估模組

TI offers a series of low-voltage differential signaling (LVDS) evaluation modules (EVMs) designed for analysis of the electrical characteristics of LVDS drivers and receivers. Four unique EVMs are available to evaluate the different classes of LVDS devices offered by TI.

As seen in the Combination (...)

使用指南: PDF
TI.com 無法提供
模擬型號

SN65LVDS31 IBIS Model (Rev. B)

SLLC012B.ZIP (6 KB) - IBIS Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計

TIDA-060017 — 透過 LVDS 介面傳輸 SPI 訊號參考設計

This reference design demonstrates how to resolve and optimize signal integrity challenges typically found when sending SPI signals over longer distance on the same PCB or off PCB to another board in a noisy environment by transmitting SPI signals over an LVDS interface. The concept offers (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian

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  • 認證摘要
  • 進行中持續性的可靠性監測
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