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LVDS、M-LVDS 和 PECL IC

SN65MLVD205A

現行

100-Mbps 全雙工 M-LVDS 收發器

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產品規格表

SN65MLVD205A

現行
產品規格表 立即訂購

產品詳細資料

Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 100 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 100 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 14 51.9 mm² 8.65 x 6
  • Low-Voltage Differential 30Ω to 55Ω Line Drivers and Receivers for Signaling Rates (1) up to 100Mbps, Clock Frequencies up to 50MHz
  • Type-1 Receivers Incorporate 25mV of Hysteresis (SN65MLVD200A, SN65MLVD202A)
  • Type-2 Receivers Provide an Offset (100mV) Threshold to Detect Open-Circuit and Idle-Bus Conditions (SN65MLVD204A, SN65MLVD205A)
  • Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • –1V to 3.4V of Common-Mode Voltage Range Allows Data Transfer With 2V of Ground Noise
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5V
  • 200Mbps Devices Available (SN65MLVD201, SN65MLVD203, SN65MLVD206, SN65MLVD207)
  • Bus Pin ESD Protection Exceeds 8kV
  • Packages Available:
    • 8-Pin SOIC SN65MLVD200A, SN65MLVD204A
    • 14-Pin SOIC SN65MLVD202A, SN65MLVD205A
  • Improved Alternatives to the SN65MLVD200, SN65MLVD202A, SN65MLVD204A, and SN65MLVD205A Devices

(1)The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second)
  • Low-Voltage Differential 30Ω to 55Ω Line Drivers and Receivers for Signaling Rates (1) up to 100Mbps, Clock Frequencies up to 50MHz
  • Type-1 Receivers Incorporate 25mV of Hysteresis (SN65MLVD200A, SN65MLVD202A)
  • Type-2 Receivers Provide an Offset (100mV) Threshold to Detect Open-Circuit and Idle-Bus Conditions (SN65MLVD204A, SN65MLVD205A)
  • Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • –1V to 3.4V of Common-Mode Voltage Range Allows Data Transfer With 2V of Ground Noise
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5V
  • 200Mbps Devices Available (SN65MLVD201, SN65MLVD203, SN65MLVD206, SN65MLVD207)
  • Bus Pin ESD Protection Exceeds 8kV
  • Packages Available:
    • 8-Pin SOIC SN65MLVD200A, SN65MLVD204A
    • 14-Pin SOIC SN65MLVD202A, SN65MLVD205A
  • Improved Alternatives to the SN65MLVD200, SN65MLVD202A, SN65MLVD204A, and SN65MLVD205A Devices

(1)The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second)

The SN65MLVD20xx devices are multipoint low-voltage differential (M-LVDS) line drivers and receivers that are optimized to operate at signaling rates up to 100 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899.

The SN65MLVD20xx devices have enhancements over their predecessors. Improved features include controlled slew rate on the driver output to help minimize reflections from unterminated stubs, which results in better signal integrity. Additionally, 8-kV ESD protection on the bus pins for more robustness. The same footprint definition was maintained making for an easy drop-in replacement for a system performance upgrade.

The devices are characterized for operation from –40°C to 85°C.

The SN65MLVD20xx devices are multipoint low-voltage differential (M-LVDS) line drivers and receivers that are optimized to operate at signaling rates up to 100 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899.

The SN65MLVD20xx devices have enhancements over their predecessors. Improved features include controlled slew rate on the driver output to help minimize reflections from unterminated stubs, which results in better signal integrity. Additionally, 8-kV ESD protection on the bus pins for more robustness. The same footprint definition was maintained making for an easy drop-in replacement for a system performance upgrade.

The devices are characterized for operation from –40°C to 85°C.
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* Data sheet SN65MLVD20xx Multipoint-LVDS Line Driver and Receiver datasheet (Rev. E) PDF | HTML 2024年 3月 1日

設計與開發

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開發板

MLVD20XBEVM — SN65MLVD203B 和 SN65MLVD204B 全雙工和半雙工多點 LVDS (M-LVDS) 評估模組

使用指南: PDF
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開發板

MLVD20XEVM — M-LVDS 評估模組

This evaluation module is for the SN65MLVD203B and SN65MLVD204B, which are M-LVDS transceivers.
The SN65MLVD203B is a full-duplex transceiver, and the SN65MLVD204B is a half-duplex transceiver.
使用指南: PDF
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模擬型號

SN65MLVD205A IBIS Model

SLLC187.ZIP (18 KB) - IBIS Model
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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