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LVDS、M-LVDS 和 PECL IC

SN65MLVD206B

現行

高雜訊抗擾 200-Mbps M-LVDS 收發器

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產品規格表

SN65MLVD206B

現行
產品規格表 立即訂購

產品詳細資料

Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 200 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 200 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Compatible with the M-LVDS standard TIA/EIA-899 for multipoint data interchange
  • Low-voltage differential 30-Ω to 55-Ω line driver and receiver for signaling rates(1) up to
    200 Mbps, clock frequencies up to 100 MHz
    • Type-2 receiver provides an offset threshold to detect open-circuit and idle-bus conditions
  • Bus I/O Protection
    • ±8-kV HBM
    • ±8-kV IEC 61000-4-2 Contact discharge
  • Controlled driver output voltage transition times for improved signal quality
  • –1-V to 3.4-V Common-mode voltage range allows data transfer with 2 V of ground noise
  • Bus pins high impedance when disabled or VCC ≤ 1.5 V
  • 100-Mbps Device Available (SN65MLVD204B)
  • Improved Alternatives to SN65MLVD206 (1)

(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the bps of the unit (bits per second).
  • Compatible with the M-LVDS standard TIA/EIA-899 for multipoint data interchange
  • Low-voltage differential 30-Ω to 55-Ω line driver and receiver for signaling rates(1) up to
    200 Mbps, clock frequencies up to 100 MHz
    • Type-2 receiver provides an offset threshold to detect open-circuit and idle-bus conditions
  • Bus I/O Protection
    • ±8-kV HBM
    • ±8-kV IEC 61000-4-2 Contact discharge
  • Controlled driver output voltage transition times for improved signal quality
  • –1-V to 3.4-V Common-mode voltage range allows data transfer with 2 V of ground noise
  • Bus pins high impedance when disabled or VCC ≤ 1.5 V
  • 100-Mbps Device Available (SN65MLVD204B)
  • Improved Alternatives to SN65MLVD206 (1)

(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the bps of the unit (bits per second).

The SN65MLVD206B device is a multipoint low-voltage differential signaling (M-LVDS) line driver and receiver which is optimized to operate at signaling rates up to 200 Mbps. This device has a robust 3.3-V driver and receiver in the standard SOIC footprint for demanding industrial applications. The bus pins are robust to ESD events, with high levels of protection to human-body model and IEC contact discharge specifications.

The device combines a differential driver and a differential receiver (transceiver), which operates from a single 3.3-V supply. The transceiver is optimized to operate at signaling rates up to 200 Mbps.

The SN65MLVD206B has enhancements over similar devices. Improved features include a controlled slew rate on the driver output to help minimize reflections from unterminated stubs, resulting in better signal integrity. The same footprint definition was maintained, allowing for an easy drop-in replacement for a system performance upgrade. The devices are characterized for operation from –40°C to 85°C.

The SN65MLVD206B M-LVDS transceiver is part of the TI extensive M-LVDS portfolio.

The SN65MLVD206B device is a multipoint low-voltage differential signaling (M-LVDS) line driver and receiver which is optimized to operate at signaling rates up to 200 Mbps. This device has a robust 3.3-V driver and receiver in the standard SOIC footprint for demanding industrial applications. The bus pins are robust to ESD events, with high levels of protection to human-body model and IEC contact discharge specifications.

The device combines a differential driver and a differential receiver (transceiver), which operates from a single 3.3-V supply. The transceiver is optimized to operate at signaling rates up to 200 Mbps.

The SN65MLVD206B has enhancements over similar devices. Improved features include a controlled slew rate on the driver output to help minimize reflections from unterminated stubs, resulting in better signal integrity. The same footprint definition was maintained, allowing for an easy drop-in replacement for a system performance upgrade. The devices are characterized for operation from –40°C to 85°C.

The SN65MLVD206B M-LVDS transceiver is part of the TI extensive M-LVDS portfolio.
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技術文件

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類型 標題 日期
* Data sheet SN65MLVD206B Multipoint-LVDS Line Driver and Receiver (Transceiver) With IEC ESD Protection datasheet (Rev. A) PDF | HTML 2018年 2月 6日
Application note An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. C) PDF | HTML 2023年 6月 22日
Application note Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners 2019年 6月 29日
Application brief How Far, How Fast Can You Operate MLVDS? 2018年 8月 6日
Technical article Why should you care about the noise immunity of MLVDS drivers and receivers? PDF | HTML 2017年 7月 26日
Application note SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) 2001年 11月 20日

設計與開發

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開發板

MLVD20XBEVM — SN65MLVD203B 和 SN65MLVD204B 全雙工和半雙工多點 LVDS (M-LVDS) 評估模組

使用指南: PDF
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開發板

MLVD20XEVM — M-LVDS 評估模組

This evaluation module is for the SN65MLVD203B and SN65MLVD204B, which are M-LVDS transceivers.
The SN65MLVD203B is a full-duplex transceiver, and the SN65MLVD204B is a half-duplex transceiver.
使用指南: PDF
TI.com 無法提供
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
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