SN75ALS176
- Meet or exceed the requirements of TIA/EIA-422-B,TIA/EIA-485-A(1) and ITU recommendations V.11 and X.27
- Operate at data rates up to 35 Mbaud
- Four skew limits available:
- SN65ALS176: 15 ns
- SN75ALS176: 10 ns
- SN75ALS176A: 7.5 ns
- SN75ALS176B: 5 ns
- Designed for multipoint transmission onlong bus lines in noisy environments
- Low supply-current requirements: 30 mA max
- Wide positive and negative input/output bus-voltage ranges
- Thermal shutdown protection
- Driver positive and negative current limiting
- Receiver input hysteresis
- Glitch-free power-up and power-down protection
- Receiver open-circuit fail-safe design
(1)These devices meet or exceed the requirements of TIA/EIA-485-A, except for the Generator Contention Test (para. 3.4.2) and the Generator Current Limit (para. 3.4.3). The applied test voltage ranges are –6 V to 8 V for the SN75ALS176, SN75ALS176A, and SN75ALS176B and –4 V to 8 V for the SN65ALS180.
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檢視所有 1 類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | SNx5ALS176, SN75ALS176A, and SN75ALS176B Differential Bus Transceivers datasheet (Rev. I) | PDF | HTML | 2023年 1月 11日 |
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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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使用指南: PDF
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
PDIP (P) | 8 | Ultra Librarian |
SOIC (D) | 8 | Ultra Librarian |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點
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