PanelBus DVI 接收器 112 MHz、HSYNC 修復

產品詳細資料

Type Transceiver Rating Catalog Operating temperature range (°C) 0 to 70
Type Transceiver Rating Catalog Operating temperature range (°C) 0 to 70
HTQFP (PZP) 100 256 mm² 16 x 16
  • Supports SXGA Resolution (Output Pixel Rates Up to 112 MHz)
  • Digital Visual Interface (DVI) Specification Compliant1
  • True-Color, 24 Bit/Pixel, 16.7M Colors at 1 or 2-Pixels Per Clock
  • Laser Trimmed Internal Termination Resistors for Optimum Fixed Impedance Matching
  • Skew Tolerant Up to One Pixel Clock Cycle
  • 4x Over-Sampling
  • Reduced Power Consumption \x96 1.8 V Core Operation With 3.3 V I/Os and Supplies2
  • Reduced Ground Bounce Using Time Staggered Pixel Outputs
  • Lowest Noise and Best Power Dissipation Using TI PowerPAD™ Packaging
  • Advanced Technology Using TI 0.18-um EPIC-5™ CMOS Process
  • TFP201A Incorporates HSYNC Jitter Immunity3
    1. The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays The TFP201 and TFP201A are compliant to the DVI Specification Rev. 1.0.
    2. The TFP201/201A has an internal voltage regulator that provides the 1.8-V core power supply from the externally supplied 3.3-V supplies.
    3. The TFP201A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on the transmitted HSYNC signal.

    PanelBus, PowerPAD and EPIC-5 are trademarks of Texas Instruments.
    I2C is a licensed bus protocol from Phillips Semiconductor, Inc.

  • Supports SXGA Resolution (Output Pixel Rates Up to 112 MHz)
  • Digital Visual Interface (DVI) Specification Compliant1
  • True-Color, 24 Bit/Pixel, 16.7M Colors at 1 or 2-Pixels Per Clock
  • Laser Trimmed Internal Termination Resistors for Optimum Fixed Impedance Matching
  • Skew Tolerant Up to One Pixel Clock Cycle
  • 4x Over-Sampling
  • Reduced Power Consumption \x96 1.8 V Core Operation With 3.3 V I/Os and Supplies2
  • Reduced Ground Bounce Using Time Staggered Pixel Outputs
  • Lowest Noise and Best Power Dissipation Using TI PowerPAD™ Packaging
  • Advanced Technology Using TI 0.18-um EPIC-5™ CMOS Process
  • TFP201A Incorporates HSYNC Jitter Immunity3
    1. The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays The TFP201 and TFP201A are compliant to the DVI Specification Rev. 1.0.
    2. The TFP201/201A has an internal voltage regulator that provides the 1.8-V core power supply from the externally supplied 3.3-V supplies.
    3. The TFP201A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on the transmitted HSYNC signal.

    PanelBus, PowerPAD and EPIC-5 are trademarks of Texas Instruments.
    I2C is a licensed bus protocol from Phillips Semiconductor, Inc.

The Texas Instruments TFP201 and TFP201A are TI PanelBus™ flat panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP201/201A finds applications in any design requiring high-speed digital interface.

The TFP201/201A supports display resolutions up to SXGA in 24-bit true color pixel format. The TFP201/201Ab offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time staggered pixel outputs for reduced ground bounce.

PowerPAD™ advanced packaging technology results in best of class power dissipation, footprint, and ultra-low ground inductance.

The TFP201/201A combines PanelBus™ circuit innovation with TI\x92s advanced 0.18-mm EPIC-5E CMOS process technology, along with TI PowerPAD™ package technology to achieve a reliable, low-powered, low noise, high-speed digital interface solution.

The Texas Instruments TFP201 and TFP201A are TI PanelBus™ flat panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP201/201A finds applications in any design requiring high-speed digital interface.

The TFP201/201A supports display resolutions up to SXGA in 24-bit true color pixel format. The TFP201/201Ab offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time staggered pixel outputs for reduced ground bounce.

PowerPAD™ advanced packaging technology results in best of class power dissipation, footprint, and ultra-low ground inductance.

The TFP201/201A combines PanelBus™ circuit innovation with TI\x92s advanced 0.18-mm EPIC-5E CMOS process technology, along with TI PowerPAD™ package technology to achieve a reliable, low-powered, low noise, high-speed digital interface solution.

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類型 標題 日期
* Errata TFP101(A), TFP201(A), TFP401(A) Errata 2003年 11月 11日
* Errata TFP101/A, TFP201/A, TFP401/A, TFP403 Data Sheet Errata 2003年 6月 27日
* Data sheet TI PanelBus(TM) Digital Receiver datasheet (Rev. A) 2002年 5月 21日

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內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
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  • 組裝地點