TL16C450

現行

沒有 FIFO 的單路 UART

產品詳細資料

Number of channels 1 FIFO (Byte) 0 Programmable FIFO trigger levels No CPU interface X86 Baud rate at Vcc = 5 V & with 16x sampling (max) (Mbps) 0.256 Operating voltage (V) 5 Auto RTS/CTS Yes Rating Catalog Operating temperature range (°C) 0 to 70
Number of channels 1 FIFO (Byte) 0 Programmable FIFO trigger levels No CPU interface X86 Baud rate at Vcc = 5 V & with 16x sampling (max) (Mbps) 0.256 Operating voltage (V) 5 Auto RTS/CTS Yes Rating Catalog Operating temperature range (°C) 0 to 70
  • Programmable Baud Rate Generator Allows Division of Any Input Reference Clock by 1 to (216 -1) and Generates an Internal 16× Clock
  • Full Double Buffering Eliminates the Need for Precise Synchronization
  • Standard Asynchronous Communication Bits (Start, Stop, and Parity) Added or Deleted to or From the Serial Data Stream
  • Independent Receiver Clock Input
  • Transmit, Receive, Line Status, and Data Set Interrupts Independently Controlled
  • Fully Programmable Serial Interface Characteristics:
    • 5-, 6-, 7-, or 8-Bit Characters
    • Even-, Odd-, or No-Parity Bit Generation and Detection
    • 1-, 1 1/2-, or 2-Stop Bit Generation
    • Baud Generation (dc to 256 Kbit/s)
  • False Start Bit Detection
  • Complete Status Reporting Capabilities
  • 3-State TTL Drive Capabilities for Bidirectional Data Bus and Control Bus
  • Line Break Generation and Detection
  • Internal Diagnostic Capabilities:
    • Loopback Controls for Communications Link Fault Isolation
    • Break, Parity, Overrun, Framing Error Simulation
  • Fully Prioritized Interrupt System Controls
  • Modem Control Functions (CTS\, RTS\, DSR\, DTR\, RI\, and DCD\)
  • Easily Interfaces to Most Popular Microprocessors
  • Faster Plug-In Replacement for National Semiconductor NS16C450

  • Programmable Baud Rate Generator Allows Division of Any Input Reference Clock by 1 to (216 -1) and Generates an Internal 16× Clock
  • Full Double Buffering Eliminates the Need for Precise Synchronization
  • Standard Asynchronous Communication Bits (Start, Stop, and Parity) Added or Deleted to or From the Serial Data Stream
  • Independent Receiver Clock Input
  • Transmit, Receive, Line Status, and Data Set Interrupts Independently Controlled
  • Fully Programmable Serial Interface Characteristics:
    • 5-, 6-, 7-, or 8-Bit Characters
    • Even-, Odd-, or No-Parity Bit Generation and Detection
    • 1-, 1 1/2-, or 2-Stop Bit Generation
    • Baud Generation (dc to 256 Kbit/s)
  • False Start Bit Detection
  • Complete Status Reporting Capabilities
  • 3-State TTL Drive Capabilities for Bidirectional Data Bus and Control Bus
  • Line Break Generation and Detection
  • Internal Diagnostic Capabilities:
    • Loopback Controls for Communications Link Fault Isolation
    • Break, Parity, Overrun, Framing Error Simulation
  • Fully Prioritized Interrupt System Controls
  • Modem Control Functions (CTS\, RTS\, DSR\, DTR\, RI\, and DCD\)
  • Easily Interfaces to Most Popular Microprocessors
  • Faster Plug-In Replacement for National Semiconductor NS16C450

The TL16C450 is a CMOS version of an asynchronous communications element (ACE). It typically functions in a microcomputer system as a serial input/output interface.

The TL16C450 performs serial-to-parallel conversion on data received from a peripheral device or modem and parallel-to-serial conversion on data received from its CPU. The CPU can read and report on the status of the ACE at any point in the ACE's operation. Reported status information includes the type of transfer operation in progress, the status of the operation, and any error conditions encountered.

The TL16C450 ACE includes a programmable, on-board, baud rate generator. This generator is capable of dividing a reference clock input by divisors from 1 to (216 -1) and producing a 16× clock for driving the internal transmitter logic. Provisions are included to use this 16× clock to drive the receiver logic. Also included in the ACE is a complete modem control capability and a processor interrupt system that may be software tailored to the user's requirements to minimize the computing required to handle the communications link.

The TL16C450 is a CMOS version of an asynchronous communications element (ACE). It typically functions in a microcomputer system as a serial input/output interface.

The TL16C450 performs serial-to-parallel conversion on data received from a peripheral device or modem and parallel-to-serial conversion on data received from its CPU. The CPU can read and report on the status of the ACE at any point in the ACE's operation. Reported status information includes the type of transfer operation in progress, the status of the operation, and any error conditions encountered.

The TL16C450 ACE includes a programmable, on-board, baud rate generator. This generator is capable of dividing a reference clock input by divisors from 1 to (216 -1) and producing a 16× clock for driving the internal transmitter logic. Provisions are included to use this 16× clock to drive the receiver logic. Also included in the ACE is a complete modem control capability and a processor interrupt system that may be software tailored to the user's requirements to minimize the computing required to handle the communications link.

下載

您可能會感興趣的類似產品

open-in-new 比較替代產品
功能相同,但引腳輸出與所比較的裝置不同
TL16C750E 現行 具有 128 位元組 FIFO 及自動流程控制的單路 UART 128 byte FIFO

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 1
類型 標題 日期
* Data sheet Asynchronous Communications Element datasheet (Rev. C) 2006年 1月 19日

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片