TLIN1021A-Q1
- AEC-Q100 (Grade 1) Qualified for automotive applications
- Compliant to LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2A and ISO 17987–4 electrical physical layer (EPL) specification
- Compliant to SAE J2602-1 LIN Network for Vehicle Applications
- Functional Safety-Capable
- Wide input operational voltage range:
- VSUP range from 4.5 V to 36 V
- LIN transmit data rate up to 20 kbps
- LIN receive data rate up to 100 kbps
- Operating modes: Normal, Standby and Sleep
- Low-power mode wake-up support with source recognition:
- Remote wake-up over the LIN bus
- Local wake-up via the WAKE pin
- Local wake-up via EN
- Integrated 45-kΩ LIN pull-up resistor
- Control of system-level power using the INH pin
- Power-up/down glitch-free operation on LIN bus and RXD output
- Protection features: ±45-V LIN bus fault tolerant, 42-V load dump support, undervoltage protection on VSUP, TXD dominant state time-out, thermal shutdown, unpowered node or ground disconnection fail-safe at system level
- Junction temperatures from -40°C to 150°C
- Available in 8-pin SOIC, VSON with wettable flanks, and SOT23 packages
The TLIN1021A-Q1 is a local interconnect network (LIN) physical layer transceiver. LIN is a low-speed universal asynchronous receiver transmitter (UART) communication protocol, that supports automotive in-vehicle networking.
The TLIN1021A-Q1 transmitter supports data rates up to 20 kbps. The transceiver controls the state of the LIN bus through the TXD pin and reports the state of the bus on its open-drain RXD output pin. The device has a current-limited wave-shaping driver to reduce electromagnetic emissions (EME).
The TLIN1021A-Q1 is designed to support 12-V applications with a wide input voltage operating range. The device supports low-power sleep mode, as well as wake-up from low-power mode through wake over LIN, the WAKE pin, or the EN pin. The device allows system-level reductions in battery current consumption, by selectively enabling the various power supplies that can be present on a node through the TLIN1021A-Q1 INH output pin.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TLIN1021A-Q1 Fault-Protected LIN Transceiver with Inhibit and Wake datasheet (Rev. B) | PDF | HTML | 2022年 4月 1日 |
Functional safety information | TLIN1021A-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA | PDF | HTML | 2020年 10月 15日 | |
EVM User's guide | TLIN1039 Evaluation Module | PDF | HTML | 2020年 4月 28日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
TLIN1021DEVM — 具有喚醒與 INH 的 TLIN1021-Q1 本機互連網路 (LIN) 收發器評估模組
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TIDEP-01036 — mmWave 雷達感測器腳踢開啟參考設計
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOIC (D) | 8 | Ultra Librarian |
SOT-23-THN (DDF) | 8 | Ultra Librarian |
VSON (DRB) | 8 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。