TLK10031
- Single Channel Multi-Rate Transceiver
- Supports 10GBASE-KR, XAUI, and 1GBASE-KX Ethernet Standards
- Supports all CPRI and OBSAI Data Rates up to 10 Gbps
- Supports Multi-Rate SERDES Operation with up to 10.3125 Gbps Data Rate on the High Speed Side and up to 5 Gbps on the Low Speed Side
- Differential CML I/Os on Both High Speed and Low Speed Sides
- Interface to Backplanes, Passive and Active Copper Cables, or SFP+ Optical Modules
- Selectable Reference Clock with Multiple Output Clock Options
- Supports PRBS, CRPAT, CJPAT, High/Low/Mixed-Frequency Patterns, and KR Pseudo-Random Pattern Generation and Verification, Square-Wave Generation
- Supports Data Retime Operation
- Two Power Supplies: 1 V (Core), and 1.5 or 1.8 V (I/O)
- No Power Supply Sequencing Requirements
- Transmit De-emphasis and Receive Adaptive Equalization to Allow Extended Backplane/Cable Reach on Both High Speed and Low Speed Sides
- Loss of Signal (LOS) Detection
- Supports 10G-KR Link Training, Forward Error Correction, Auto-Negotiation
- Jumbo Packet Support
- JTAG; IEEE 1149.1 Test Interface
- Industry Standard MDIO Control Interface
- 65nm Advanced CMOS Technology
- Industrial Ambient Operating Temperature (–40°C to 85°C)
- Power Consumption: 800 mW (Nominal)
The TLK10031 is a single-channel multi-rate transceiver intended for use in high-speed bi-directional point-to-point data transmission systems. This device supports three primary modes. It can be used as a XAUI to 10GBASE-KR transceiver, as a general-purpose 8b/10b multi-rate 4:1, 2:1, or 1:1 serializer/deserializer, or can be used in 1G-KX mode.
技術文件
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檢視所有 1 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TLK10031 Single-Channel XAUI/10GBASE-KR Transceiver datasheet (Rev. C) | PDF | HTML | 2017年 9月 6日 |
設計與開發
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開發板
TLK10232EVM — TLK10232EVM - 適用於 TLK10232 的主機板評估模組
Motherboard evaluation board for TLK10232 comes with custom-developed GUI and a detailed EVM user guide. This EVM along with the GUI, enable customers to configure the registers of all the channels independently and to debug the device. The user’s guide provides guidance on proper use of the (...)
使用指南: PDF
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| FCBGA (CTR) | 144 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。