TLV840

現行

具有可調整重設時間延遲和手動重設功能的低電壓監控器

產品詳細資料

Number of supplies monitored 1 Threshold voltage 1 (typ) (V) 0.8, 1, 1.1, 1.3, 1.4, 2, 2.8, 2.9, 3, 3.3, 3.5, 4, 4.6, 5, 5.2 Features Detection time delay, Manual reset capable, Reset time delay, Separate VDD & sense, Undervoltage monitor only Reset threshold accuracy (%) 1 Iq (typ) (mA) 0.0001 Output driver type/reset output Active-low, Open-drain, Push-Pull Time delay (ms) 0.04 Supply voltage (min) (V) 0.7 Supply voltage (max) (V) 6 Rating Catalog Watchdog timer WDI (s) None Operating temperature range (°C) -40 to 125
Number of supplies monitored 1 Threshold voltage 1 (typ) (V) 0.8, 1, 1.1, 1.3, 1.4, 2, 2.8, 2.9, 3, 3.3, 3.5, 4, 4.6, 5, 5.2 Features Detection time delay, Manual reset capable, Reset time delay, Separate VDD & sense, Undervoltage monitor only Reset threshold accuracy (%) 1 Iq (typ) (mA) 0.0001 Output driver type/reset output Active-low, Open-drain, Push-Pull Time delay (ms) 0.04 Supply voltage (min) (V) 0.7 Supply voltage (max) (V) 6 Rating Catalog Watchdog timer WDI (s) None Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Operating voltage range : 0.7 V to 6 V
  • Nano supply current : 120 nA (Typical)
  • Fixed threshold voltage (VIT-): 0.8 V to 5.4 V
    • Threshold voltages available in 100mV steps
    • High accuracy: ±0.5% (Typical)
    • Built-in hysteresis (VHYS): 5% (Typical)
  • Reset time delay (tD): capacitor-based programmable (TLV840C, TLV840M)
    • Minimum time delay: 40 µs (typical) without capacitor
  • Active-low manual reset (MR) (TLV840M)
  • Four output topologies:
    • TLV840xxDL: open-drain, active-low (RESET)
    • TLV840xxPL: push-pull, active-low (RESET)
    • TLV840xxDH: open-drain, active-high (RESET)
    • TLV840xxPH: push-pull, active-high (RESET)
  • Wide temperature range: –40°C to +125°C
  • Package: SOT23-5 (DBV)
  • Operating voltage range : 0.7 V to 6 V
  • Nano supply current : 120 nA (Typical)
  • Fixed threshold voltage (VIT-): 0.8 V to 5.4 V
    • Threshold voltages available in 100mV steps
    • High accuracy: ±0.5% (Typical)
    • Built-in hysteresis (VHYS): 5% (Typical)
  • Reset time delay (tD): capacitor-based programmable (TLV840C, TLV840M)
    • Minimum time delay: 40 µs (typical) without capacitor
  • Active-low manual reset (MR) (TLV840M)
  • Four output topologies:
    • TLV840xxDL: open-drain, active-low (RESET)
    • TLV840xxPL: push-pull, active-low (RESET)
    • TLV840xxDH: open-drain, active-high (RESET)
    • TLV840xxPH: push-pull, active-high (RESET)
  • Wide temperature range: –40°C to +125°C
  • Package: SOT23-5 (DBV)

The TLV840 family of voltage supervisors or reset ICs can operate at high voltage levels while maintaining very low quiescent current across the whole VDD and temperature range. TLV840 offers best combination of low power consumption, high accuracy and low propagation delay (tp_HL= 30 µs typical).

Reset output signal is asserted when the voltage at VDD drops below the negative voltage threshold (VIT-). Reset signal is cleared when VDD rise above VIT- plus hysteresis (VHYS) and the reset time delay (tD) expires. Reset time delay can be programmed by connecting a capacitor between the CT pin and ground for TLV840C and TLV840M. For a minimum reset delay time the CT pin can be left floating. TLV840N does not offer a programmable delay and offers fixed reset delay timing options: 40 µs, 2 ms, 10 ms, 30 ms, 50 ms, 80 ms, 100 ms, 150 ms, 200 ms.

Additional features: Low power-on reset voltage (VPOR), built-in glitch immunity protection for VDD, built-in hysteresis, low open-drain output leakage current (Ilkg(OD)). TLV840 is a perfect voltage monitoring solution for industrial applications and battery-powered / low-power applications.

The TLV840 family of voltage supervisors or reset ICs can operate at high voltage levels while maintaining very low quiescent current across the whole VDD and temperature range. TLV840 offers best combination of low power consumption, high accuracy and low propagation delay (tp_HL= 30 µs typical).

Reset output signal is asserted when the voltage at VDD drops below the negative voltage threshold (VIT-). Reset signal is cleared when VDD rise above VIT- plus hysteresis (VHYS) and the reset time delay (tD) expires. Reset time delay can be programmed by connecting a capacitor between the CT pin and ground for TLV840C and TLV840M. For a minimum reset delay time the CT pin can be left floating. TLV840N does not offer a programmable delay and offers fixed reset delay timing options: 40 µs, 2 ms, 10 ms, 30 ms, 50 ms, 80 ms, 100 ms, 150 ms, 200 ms.

Additional features: Low power-on reset voltage (VPOR), built-in glitch immunity protection for VDD, built-in hysteresis, low open-drain output leakage current (Ilkg(OD)). TLV840 is a perfect voltage monitoring solution for industrial applications and battery-powered / low-power applications.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 7
類型 標題 日期
* Data sheet TLV840 Low Voltage Supervisor with Adjustable Reset Time Delay and Manual Reset datasheet (Rev. C) 2020年 8月 13日
Technical article Three reasons to add a voltage supervisor to your next wearable power design PDF | HTML 2021年 6月 17日
Application note Back-up Power Supply Switchover with Supply Voltage Supervisor & Power & Power M 2020年 4月 9日
Application note Programmable Push-Button, Pulse Detector, and Pulse Generator Solutions 2020年 3月 10日
Selection guide Voltage Supervisors (Reset ICs) Quick Reference Guide (Rev. H) 2020年 2月 28日
EVM User's guide TLV840EVM Voltage Supervisor User's Guide 2020年 2月 13日
E-book Voltage Supervisor and Reset ICs: Tips, Tricks and Basics 2019年 6月 28日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TLV840EVM — 具有可調整復位時間延遲的低電壓監控器的 TLV840 評估模組

The TLV840 evaluation module (EVM) is designed to evaluate the performance of the TLV840 product, which is a 5-pin voltage supervisor and reset IC. TLV840 offers operation up to 6 V, while maintaining low quiescent current of 1.2 µA (max) in addition to 2% maximum accuracy.

TLV840EVM supports (...)

使用指南: PDF
TI.com 無法提供
模擬型號

TLV840 PSpice Model

SNVMC19.ZIP (56 KB) - PSpice Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOT-23 (DBV) 5 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片