TNETE2201B
- 1.25 Gigabits Per Second (Gbps) Gigabit Ethernet Transceiver
- Based on the P802.3Z Specification
- Transmits Serial Data up to 1.25 Gbps
- Operates With 3.3-V Supply Voltage
- 5-V Tolerant on TTL Inputs
- Interfaces to Electrical Cables/Backplane or Optical Modules
- PECL Voltage Differential Signaling Load, 1 V Typ With 50
- Receiver Differential Input Voltage 200 mV Minimum
- Low Power Consumption
- 64-Pin Quad Flat Pack With Thermally Enhanced Package
The TNETE2201B gigabit Ethernet transceiver provides for ultra high-speed bidirectional point-to-point data transmission. This device is based on the timing requirements of the proposed 10-bit interface specification by the P802.3z Gigabit Task Force.
The intended application of this device is to provide building blocks for developing point-to-point baseband data transmission over controlled-impedance media of approximately 50 . The transmission media can be printed-circuit board traces, back planes, cables, or fiber optical media. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.
The TNETE2201B performs the data serialization and deserialization (SERDES) functions for the gigabit ethernet physical layer interface. The transceiver operates at 1.25 Gbps (typical), providing up to 1000 Mbps of bandwidth over a copper or optical media interface. The serializer/transmitter accepts 8b/10b parallel encoded data bytes. The parallel data bytes are serialized and transmitted differentially nonreturn-to-zero (NRZ) at pseudo-ECL (PECL) voltage levels. The deserializer/receiver extracts clock information from the input serial stream and deserializes the data, outputting a parallel 10-bit data byte. The 10-bit data bytes are output with respect to two receive byte clocks (RBC0, RBC1), allowing a protocol device to clock the parallel bytes in RBC clock rising edges.
The transceiver automatically locks onto incoming data without the need to prelock. However, the transceiver can be commanded to lock to the externally supplied reference clock (REFCLK) as a reset function, if needed.
The TNETE2201B provides an internal loopback capability for self-test purposes. Serial data from the serializer is passed directly to the deserializer allowing the protocol device a functional self-check of the physical interface.
The TNETE2201B is characterized for operation from 0°C to 70°C.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TNETE2201B: 1.25-Gigabit Ethernet Transceiver datasheet (Rev. D) | 2007年 8月 9日 | |
White paper | HDMP16x6A vs TNETE2201B | 2003年 6月 25日 | ||
Application note | Interfacing Between LVPECL, VML, CML and LVDS Levels | 2002年 12月 17日 | ||
Application note | Board Layout Adjustments Between the TNETE2201B and TLK2201 | 2002年 5月 13日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
HTQFP (PHD) | 64 | Ultra Librarian |
HTQFP (PJD) | 64 | Ultra Librarian |
HTQFP (PJW) | 64 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點